Target/ARM/ARMAsmPrinter.cpp

63   if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) {
69   unsigned Reg = MLoc.getReg();
175     unsigned Reg = MO.getReg();
263           << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
279         unsigned Reg = MI->getOperand(OpNum).getReg();
306       unsigned RegBegin = MO.getReg();
326           << ARMInstPrinter::getRegisterName(MI->getOperand(RegOps).getReg());
369         unsigned Reg = TRI->getSubReg(MO.getReg(), ExtraCode[0] == 'Q' ?
382       unsigned Reg = MO.getReg();
391       unsigned Reg = MI->getOperand(OpNum).getReg();
410       unsigned Reg = MO.getReg();
438         O << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg());
445   O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]";
987     SrcReg = MI->getOperand(1).getReg();
988     DstReg = MI->getOperand(0).getReg();
1022         RegList.push_back(MO.getReg());
1028       assert(MI->getOperand(2).getReg() == ARM::SP &&
1140       .addReg(MI->getOperand(0).getReg())
1144       .addReg(MI->getOperand(3).getReg()));
1157       .addReg(MI->getOperand(0).getReg())
1161       .addReg(MI->getOperand(4).getReg()));
1177       .addReg(MI->getOperand(0).getReg()));
1189       .addReg(MI->getOperand(0).getReg())
1207       .addReg(MI->getOperand(0).getReg())
1239     TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1276     TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1277     TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
1321       .addReg(MI->getOperand(0).getReg())
1322       .addReg(MI->getOperand(0).getReg())
1342       .addReg(MI->getOperand(0).getReg())
1344       .addReg(MI->getOperand(1).getReg())
1347       .addReg(MI->getOperand(4).getReg())
1386       .addReg(MI->getOperand(0).getReg())
1388       .addReg(MI->getOperand(1).getReg())
1392       .addReg(MI->getOperand(4).getReg()));
1424       .addReg(MI->getOperand(0).getReg())
1437       .addReg(MI->getOperand(0).getReg())
1452       .addReg(MI->getOperand(0).getReg())
1470     TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1491     if (MI->getOperand(1).getReg() == 0) {
1495       TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1500       TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1501       TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
1518       .addReg(MI->getOperand(0).getReg())
1519       .addReg(MI->getOperand(1).getReg())
1572     unsigned SrcReg = MI->getOperand(0).getReg();
1573     unsigned ValReg = MI->getOperand(1).getReg();
1638     unsigned SrcReg = MI->getOperand(0).getReg();
1639     unsigned ValReg = MI->getOperand(1).getReg();
1695     unsigned SrcReg = MI->getOperand(0).getReg();
1696     unsigned ScratchReg = MI->getOperand(1).getReg();
1734     unsigned SrcReg = MI->getOperand(0).getReg();
1735     unsigned ScratchReg = MI->getOperand(1).getReg();