CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

285     const SDNode *Node = RegDefPos.GetNode();
288     if (!Node->isMachineOpcode() && Node->getOpcode() == ISD::CopyFromReg) {
289       unsigned Reg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
296     unsigned Opcode = Node->getMachineOpcode();
298       unsigned DstRCIdx = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
550     for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode())
551       if (Node->isMachineOpcode() &&
552           Node->getMachineOpcode() == (unsigned)TII->getCallFrameDestroyOpcode()) {
555         SDNode *N = FindCallSeqStart(Node, NestLevel, MaxNest, TII);
999     assert(N->getNodeId() == -1 && "Node already inserted!");
1271   for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) {
1272     if (Node->getOpcode() == ISD::INLINEASM) {
1274       unsigned NumOps = Node->getNumOperands();
1275       if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
1280           cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
1289             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
1299     if (!Node->isMachineOpcode())
1304     if (Node->getMachineOpcode() == (unsigned)TII->getCallFrameDestroyOpcode()) {
1311         if (!IsChainDependent(Gen, Node, 0, TII) && RegAdded.insert(CallResource))
1315     if (const uint32_t *RegMask = getNodeRegMask(Node))
1318     const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode());
1701     assert(!U->NodeQueueId && "Node in the queue already");
1821 //           Static Node Priority for Register Pressure Reduction
2187 //           Dynamic Node Priority for Register Pressure Reduction
2912     SDNode *Node = SU->getNode();
2913     if (!Node || !Node->isMachineOpcode() || SU->getNode()->getGluedNode())
2917     unsigned Opc = Node->getMachineOpcode();