Lines Matching refs:BrCond
106 /// BrCond - Conditions for end of block conditional branches.
124 SmallVector<MachineOperand, 4> BrCond;
448 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
450 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
510 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
645 BBI.BrCond.clear();
647 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
650 if (BBI.BrCond.size()) {
733 if (BBI.BrCond.size()) {
739 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
769 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
798 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
815 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
833 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
848 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
856 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
1029 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1116 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1184 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1185 CvtBBI->BrCond.end());
1262 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1265 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;