Lines Matching refs:operands
26 - optional operands
5663 enum ia64_opnd opnd = idesc->operands[index];
5752 /* register operands: */
5807 /* indirect operands: */
5829 /* immediate operands: */
5833 bits = operand_width (idesc->operands[index]);
5907 fix->opnd = idesc->operands[index];
5942 bits = operand_width (idesc->operands[index]);
5953 bits = operand_width (idesc->operands[index]);
6029 bits = operand_width (idesc->operands[index]);
6036 if (idesc->operands[index] == IA64_OPND_IMM14)
6048 fix->opnd = idesc->operands[index];
6154 fix->opnd = idesc->operands[index];
6173 fix->opnd = idesc->operands[index];
6187 fix->opnd = idesc->operands[index];
6228 /* Parse the operands for the opcode and find the opcode variant that
6229 matches the specified operands, or NULL if no match is possible. */
6248 if (idesc->operands[2] == IA64_OPND_SOF
6249 || idesc->operands[1] == IA64_OPND_SOF)
6253 remaining operands of the "alloc" instruction. */
6303 if (idesc->operands[2] == IA64_OPND_SOF
6304 || idesc->operands[1] == IA64_OPND_SOF)
6308 messages for any of the constant operands will not be correct. */
6349 if (num_operands > NELEMS (idesc->operands)
6350 || (num_operands < NELEMS (idesc->operands)
6351 && idesc->operands[num_operands])
6352 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6359 /* Try to match all operands. If we see an out-of-range operand,
6360 then continue trying to match the rest of the operands, since if
6364 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6377 /* If we did not match all operands, or if at least one operand was
6379 idesc matched the most operands before failing. If we have two
6395 expected_operand = idesc->operands[out_of_range_pos];
6400 expected_operand = idesc->operands[i];
6417 as_bad ("Wrong number of output operands");
6419 as_bad ("Wrong number of input operands");
6426 - r0, f0, or f1 as output operands
6427 - the same predicate twice as output operands
6430 - two even- or two odd-numbered FRs as output operands of a floating
6432 At most two (conflicting) output (or output-like) operands can exist,
6441 switch (idesc->operands[i])
6562 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6571 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6577 switch (idesc->operands[i])
6648 odesc = elf64_ia64_operands + idesc->operands[i];
6976 opnd1 = idesc->operands[0];
6977 opnd2 = idesc->operands[1];
6984 && (idesc->operands[0] != opnd1
6985 || idesc->operands[1] != opnd2))
8408 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8434 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8473 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8496 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8536 if (idesc->operands[i] == IA64_OPND_B1
8537 || idesc->operands[i] == IA64_OPND_B2)
8546 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8547 if (idesc->operands[i] == IA64_OPND_B1
8548 || idesc->operands[i] == IA64_OPND_B2)
8561 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8586 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8616 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8655 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8695 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8696 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8699 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8724 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8749 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8782 && idesc->operands[1] == IA64_OPND_CR3
8795 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8817 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8829 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8851 && idesc->operands[0] == IA64_OPND_F1)
8859 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8861 if (idesc->operands[i] == IA64_OPND_F2
8862 || idesc->operands[i] == IA64_OPND_F3
8863 || idesc->operands[i] == IA64_OPND_F4)
8886 if (idesc->operands[i] == IA64_OPND_R1
8887 || idesc->operands[i] == IA64_OPND_R2
8888 || idesc->operands[i] == IA64_OPND_R3)
8895 for (i = 0; i < NELEMS (idesc->operands); i++)
8896 if (idesc->operands[i] == IA64_OPND_MR3)
8906 for (i = 0; i < NELEMS (idesc->operands); i++)
8908 if (idesc->operands[i] == IA64_OPND_MR3
8909 || idesc->operands[i] == IA64_OPND_CPUID_R3
8910 || idesc->operands[i] == IA64_OPND_DBR_R3
8911 || idesc->operands[i] == IA64_OPND_IBR_R3
8912 || idesc->operands[i] == IA64_OPND_MSR_R3
8913 || idesc->operands[i] == IA64_OPND_PKR_R3
8914 || idesc->operands[i] == IA64_OPND_PMC_R3
8915 || idesc->operands[i] == IA64_OPND_PMD_R3
8916 || idesc->operands[i] == IA64_OPND_RR_R3
8918 && (idesc->operands[i] == IA64_OPND_R1
8919 || idesc->operands[i] == IA64_OPND_R2
8920 || idesc->operands[i] == IA64_OPND_R3
8922 || idesc->operands[i] == IA64_OPND_R3_2)))
8973 if (idesc->operands[i] == IA64_OPND_P1
8974 || idesc->operands[i] == IA64_OPND_P2)
9007 if ((idesc->operands[0] == IA64_OPND_P1
9008 || idesc->operands[0] == IA64_OPND_P2)
9016 if ((idesc->operands[1] == IA64_OPND_P1
9017 || idesc->operands[1] == IA64_OPND_P2)
9033 if (idesc->operands[1] == IA64_OPND_PR)
9065 && idesc->operands[0] == IA64_OPND_PR)
9076 && idesc->operands[0] == IA64_OPND_PR_ROT)
9095 if (idesc->operands[i] == IA64_OPND_P1
9096 || idesc->operands[i] == IA64_OPND_P2)
9129 if ((idesc->operands[0] == IA64_OPND_P1
9130 || idesc->operands[0] == IA64_OPND_P2)
9138 if ((idesc->operands[1] == IA64_OPND_P1
9139 || idesc->operands[1] == IA64_OPND_P2)
9155 if (idesc->operands[1] == IA64_OPND_PR)
9176 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9183 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9193 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9219 if (idesc->operands[0] == IA64_OPND_CR3
9220 || idesc->operands[1] == IA64_OPND_CR3)
9223 ((idesc->operands[0] == IA64_OPND_CR3)
9255 if (idesc->operands[0] == IA64_OPND_AR3
9256 || idesc->operands[1] == IA64_OPND_AR3)
9259 ((idesc->operands[0] == IA64_OPND_AR3)
9286 if (idesc->operands[0] == IA64_OPND_IMMU24)
9304 for (i = 0; i < NELEMS (idesc->operands); i++)
9306 if (idesc->operands[i] == IA64_OPND_F1
9307 || idesc->operands[i] == IA64_OPND_F2
9308 || idesc->operands[i] == IA64_OPND_F3
9309 || idesc->operands[i] == IA64_OPND_F4)
9327 if (idesc->operands[i] == IA64_OPND_F1)
9339 for (i = 0; i < NELEMS (idesc->operands); i++)
9341 if (idesc->operands[i] == IA64_OPND_R1
9342 || idesc->operands[i] == IA64_OPND_R2
9343 || idesc->operands[i] == IA64_OPND_R3)
9360 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
9379 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9385 else if (idesc->operands[0] == IA64_OPND_AR3)
9409 else if (idesc->operands[1] == IA64_OPND_AR3)
9441 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9475 if ((idesc->operands[0] == IA64_OPND_CR3
9477 || (idesc->operands[1] == IA64_OPND_CR3
9505 for (i = 0; i < NELEMS (idesc->operands); i++)
9507 if (idesc->operands[i] == IA64_OPND_R1
9508 || idesc->operands[i] == IA64_OPND_R2
9509 || idesc->operands[i] == IA64_OPND_R3)
9521 else if (idesc->operands[i] == IA64_OPND_F1
9522 || idesc->operands[i] == IA64_OPND_F2
9523 || idesc->operands[i] == IA64_OPND_F3
9524 || idesc->operands[i] == IA64_OPND_F4)
9533 else if (idesc->operands[i] == IA64_OPND_P1
9534 || idesc->operands[i] == IA64_OPND_P2)
9562 if (idesc->operands[2] == IA64_OPND_IMM17)
9569 if ((idesc->operands[0] == IA64_OPND_P1
9571 || (idesc->operands[1] == IA64_OPND_P2
9594 && (idesc->operands[0] == IA64_OPND_P1
9595 || idesc->operands[0] == IA64_OPND_P2))
9602 && (idesc->operands[1] == IA64_OPND_P1
9603 || idesc->operands[1] == IA64_OPND_P2))
9632 if (idesc->operands[0] == IA64_OPND_AR3
9640 if (idesc->operands[0] == IA64_OPND_AR3)
9648 else if (idesc->operands[1] == IA64_OPND_AR3)
9950 if (idesc->operands[i] == IA64_OPND_R1
9951 || idesc->operands[i] == IA64_OPND_R2
9952 || idesc->operands[i] == IA64_OPND_R3)
9958 else if (idesc->operands[i] == IA64_OPND_R3_2)
9964 else if (idesc->operands[i] == IA64_OPND_P1
9965 || idesc->operands[i] == IA64_OPND_P2)
9970 else if (idesc->operands[i] == IA64_OPND_PR)
9972 if (idesc->operands[2] & (valueT) 0x10000)
9973 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9975 qp_changemask = idesc->operands[2];
9978 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9980 if (idesc->operands[1] & ((valueT) 1 << 43))
9981 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9983 qp_changemask = idesc->operands[1];
10024 else if ((idesc->operands[0] == IA64_OPND_P1
10025 || idesc->operands[0] == IA64_OPND_P2)
10026 && (idesc->operands[1] == IA64_OPND_P1
10027 || idesc->operands[1] == IA64_OPND_P2))
10086 else if (idesc->operands[0] == IA64_OPND_R1
10087 && (idesc->operands[1] == IA64_OPND_IMM22
10088 || idesc->operands[1] == IA64_OPND_IMMU64)
10108 else if (idesc->operands[0] == IA64_OPND_R1
10109 && idesc->operands[1] == IA64_OPND_IMM8
10863 opnd1 = idesc->operands[0];
10864 opnd2 = idesc->operands[1];
10887 && (idesc->operands[0] != opnd1
10888 || idesc->operands[1] != opnd2))
10899 opnd1 = idesc->operands[0];
10900 opnd2 = idesc->operands[1];