Lines Matching refs:PC

3682       as_bad (_("SP and PC not permitted in .unwind_movsp directive"));
4558 label .reg=PC .reloc.pc_rel=1 .reloc.exp=label
4574 /* bare address - translate to PC-relative offset */
5423 OP_oRRnpc, /* ARM register, not the PC */
6956 /* If op 1 were present and equal to PC, this function wouldn't
7335 /* ARM V6 RFE (Return from Exception) loads the PC and CPSR from the
7537 /* If op 2 were present and equal to PC, this function wouldn't
8218 constraint (is_pc, _("cannot use register index with PC-relative addressing"));
8244 _("cannot use writeback with PC-relative addressing"));
8265 constraint (is_pc, _("cannot use post-indexing with PC-relative addressing"));
8393 constraint (Rd == 15, _("PC not allowed as destination"));
8464 _("only SUBS PC, LR, #const allowed"));
8613 inst.reloc.exp.X_add_number -= 4; /* PC relative adjust. */
8982 because BX PC only works if the instruction is word aligned. */
9136 inst.error = _("LR and PC should not both be in register list");
9146 inst.error = _("PC not allowed in register list");
9522 /* MOVS PC, LR is encoded as SUBS PC, LR, #0. */
10408 _("PC is not a valid index register"));
14493 REGDEF(IP,12,RN), REGDEF(SP,13,RN), REGDEF(LR,14,RN), REGDEF(PC,15,RN),
16841 /* Return the size of a relaxable adr pseudo-instruction or PC-relative
17549 /* Return the address within the segment that a PC-relative fixup is
17550 relative to. For ARM, PC-relative fixups applied to instructions
17552 Thumb branches are offset by 4, and Thumb loads relative to PC
17576 /* PC relative addressing on the Thumb is slightly odd as the
17577 bottom two bits of the PC are forced to zero for the
17624 /* ARM mode loads relative to PC are also offset by +8. Unlike
17635 /* Other PC-relative relocations are un-offset. */
18015 _("unable to compute ADRL instructions for PC offset of 0x%lx"),
18021 is the PC) with the destination register. We have
18022 already added in the PC in the first instruction and we
18107 1111 100S uTTL 1111 XXXX iiii iiii iiii - +/-(U) 12-bit PC-rel
18117 a PC-relative operation. */
18146 /* PC-relative, 12-bit offset. */
18618 case 4: /* PC load. */
18619 /* Thumb PC loads are somewhat odd, bit 1 of the PC is
18685 10bit ADD PC/SP word-aligned
18701 Adjusting SP, and using PC or SP to get an address. */