nlm/hal/fmn.c

141 	uint64_t val;
143 	val = (((uint64_t)credit << 24) | (destid << 12) | (srcid << 0));
144 	nlm_write_cms_reg(base, CMS_OUTPUTQ_CREDIT_CFG, val);
185 void nlm_cms_set_onchip_queue (uint64_t base, int qid, uint64_t val)
190 	rdval |= val;
197 	uint64_t val;
199 	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
201 	val &= ~((0x7ULL << 56) | (0x3ULL << 54));
203 	val |= (((uint64_t)sub_type<<54) |
206 	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val);
212 	uint64_t val;
214 	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
216 	val &= ~((0x7ULL << 51) | (0x3ULL << 49));
218 	val |= (((uint64_t)sub_type<<49) |
221 	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val);
227 	uint64_t val;
228 	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
230 	return ((val >> 59) & 0x1);
235 	uint64_t val;
236 	val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid));
237 	val |= (1ULL<<59);
238 	nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val);
243 	uint64_t val;
245 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
246 	val |= (en<<8);
247 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
252 	uint64_t val;
254 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
255 	val |= (en<<7);
256 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
261 	uint64_t val;
263 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
264 	val |= (en<<6);
265 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
270 	uint64_t val;
272 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
273 	val |= (en<<5) | (en<<3);
274 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
279 	uint64_t val;
281 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
282 	val |= (en<<4) | (en<<2);
283 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
288 	uint64_t val;
290 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
291 	val |= (en<<1);
292 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
297 	uint64_t val;
299 	val = nlm_read_cms_reg(base, CMS_MSG_CONFIG);
300 	val |= (en<<0);
301 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);
336 	uint64_t val;
341 	val = nlm_read_cms_reg(base, CMS_TRACE_CONFIG);
342 	val |= (((uint64_t)match_dstid_en << 39) |
348 	nlm_write_cms_reg(base, CMS_MSG_CONFIG, val);