Lines Matching defs:WRITE_REG
169 #define WRITE_REG(sc,reg,val) \
458 WRITE_REG(sc, SAFE_HI_MASK, 0); /* disable interrupts */
540 WRITE_REG(sc, SAFE_HI_CLR, stat); /* IACK */
625 WRITE_REG(sc, SAFE_HI_RD_DESCR, 0);
1654 WRITE_REG(sc, SAFE_RNG_CTRL, 0);
1656 WRITE_REG(sc, SAFE_RNG_CNFG, 0x834); /* magic from SafeNet */
1657 WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
1696 WRITE_REG(sc, SAFE_RNG_CTRL,
1703 WRITE_REG(sc, SAFE_RNG_CTRL,
1753 WRITE_REG(sc, SAFE_RNG_CNFG, w);
1755 WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
1768 WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
1877 WRITE_REG(sc, SAFE_PE_DMACFG, v
1881 WRITE_REG(sc, SAFE_PE_DMACFG, v);
1901 WRITE_REG(sc, SAFE_PE_DMACFG, v);
1904 WRITE_REG(sc, SAFE_ENDIAN, 0x1b);
1914 WRITE_REG(sc, SAFE_DMA_CFG, 256);
1923 WRITE_REG(sc, SAFE_PE_PDRBASE, sc->sc_ringalloc.dma_paddr);
1924 WRITE_REG(sc, SAFE_PE_RDRBASE, sc->sc_ringalloc.dma_paddr);
1931 WRITE_REG(sc, SAFE_PE_RINGCFG,
1933 WRITE_REG(sc, SAFE_PE_RINGPOLL, 0); /* disable polling */
1935 WRITE_REG(sc, SAFE_PE_GRNGBASE, sc->sc_spalloc.dma_paddr);
1936 WRITE_REG(sc, SAFE_PE_SRNGBASE, sc->sc_dpalloc.dma_paddr);
1937 WRITE_REG(sc, SAFE_PE_PARTSIZE,
1944 WRITE_REG(sc, SAFE_PE_PARTCFG, SAFE_MAX_DSIZE);
1947 WRITE_REG(sc, SAFE_PE_DMACFG, v | SAFE_PE_DMACFG_PEMODE);
1953 WRITE_REG(sc, SAFE_HI_CFG, SAFE_HI_CFG_LEVEL);
1954 WRITE_REG(sc, SAFE_HI_DESC_CNT, 1);
1955 WRITE_REG(sc, SAFE_HI_MASK, SAFE_INT_PE_DDONE | SAFE_INT_PE_ERROR);