Lines Matching defs:control
127 /* The counter value is the next value after the control register. */
164 cvmx_core_perf_control_t control;
171 control.s.event = event;
174 control.s.k = 1;
175 control.s.s = 1;
176 control.s.ex = 1;
180 control.s.u = 1;
183 control.s.k = 1;
184 control.s.s = 1;
185 control.s.u = 1;
186 control.s.ex = 1;
190 control.s.ie = 1;
192 PMCDBG(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, control.u32);
194 return (control.u32);