Lines Matching defs:phase
53 * the reference carrier cycle. A type-II phase-lock loop (PLL) performs
91 * modulation index (0-1), time constant (4-10), carrier phase error
172 * of the first cycle of the second. The IIR baseband filter phase delay
216 double phase, freq; /* logical clock phase and frequency */
217 double zxing; /* phase detector integrator */
218 double yxing; /* cycle phase */
219 double exing; /* envelope phase */
249 int envphase; /* envelope phase */
250 int envptr; /* envelope phase pointer */
445 up->phase += (up->freq + clock_codec) / SECOND;
446 up->phase += pp->fudgetime2 / 1e6;
447 if (up->phase >= .5) {
448 up->phase -= 1.;
449 } else if (up->phase < -.5) {
450 up->phase += 1.;
525 * phase delay 1.03 ms.
549 * 0.3 dB passband ripple, -50 dB stopband ripple, phase delay
599 int carphase; /* carrier phase */
607 * amplitude and phase estimate. We keep one cycle (1 ms) of the
620 * relative to sample 4 in the 8-sample sycle. A phase change of
629 * phase, frequency and time constant.
650 * Update PLL phase and frequency. The PLL time constant
659 up->phase += dtemp / up->tc;