Lines Matching defs:MI
45 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
338 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
339 OutMI.setOpcode(MI->getOpcode());
341 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
342 const MachineOperand &MO = MI->getOperand(i);
347 MI->dump();
601 const MachineInstr &MI) {
603 bool is64Bits = MI.getOpcode() == X86::TLS_addr64 ||
604 MI.getOpcode() == X86::TLS_base_addr64;
606 bool needsPadding = MI.getOpcode() == X86::TLS_addr64;
614 switch (MI.getOpcode()) {
629 MCSymbol *sym = MCInstLowering.GetSymbolFromOperand(MI.getOperand(3));
766 const MachineInstr &MI)
768 unsigned NumNOPBytes = MI.getOperand(1).getImm();
769 SM.recordStackMap(MI);
782 const MachineInstr &MI) {
783 SM.recordPatchPoint(MI);
785 PatchPointOpers opers(&MI);
796 .addReg(MI.getOperand(ScratchIdx).getReg())
799 .addReg(MI.getOperand(ScratchIdx).getReg()));
810 void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
812 switch (MI->getOpcode()) {
826 unsigned Reg = MI->getOperand(0).getReg();
842 return LowerTlsAddr(OutStreamer, MCInstLowering, *MI);
863 .addReg(MI->getOperand(0).getReg()));
869 if (MI->getOperand(2).getTargetFlags() != X86II::MO_GOT_ABSOLUTE_ADDRESS)
883 MCSymbol *OpSym = MCInstLowering.GetSymbolFromOperand(MI->getOperand(2));
894 .addReg(MI->getOperand(0).getReg())
895 .addReg(MI->getOperand(1).getReg())
901 return LowerSTACKMAP(OutStreamer, SM, *MI);
904 return LowerPATCHPOINT(OutStreamer, SM, *MI);
920 MCInstLowering.Lower(MI, TmpInst);