Target/SystemZ/SystemZISelLowering.cpp

2243 // Split MBB after MI and return the new block (the one that contains
2244 // instructions after MI).
2245 static MachineBasicBlock *splitBlockAfter(MachineInstr *MI,
2249                  llvm::next(MachineBasicBlock::iterator(MI)),
2255 // Split MBB before MI and return the new block (the one that contains MI).
2256 static MachineBasicBlock *splitBlockBefore(MachineInstr *MI,
2259   NewMBB->splice(NewMBB->begin(), MBB, MI, MBB->end());
2264 // Force base value Base into a register before MI.  Return the register.
2265 static unsigned forceReg(MachineInstr *MI, MachineOperand &Base,
2270   MachineBasicBlock *MBB = MI->getParent();
2275   BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(SystemZ::LA), Reg)
2280 // Implement EmitInstrWithCustomInserter for pseudo Select* instruction MI.
2282 SystemZTargetLowering::emitSelect(MachineInstr *MI,
2286   unsigned DestReg  = MI->getOperand(0).getReg();
2287   unsigned TrueReg  = MI->getOperand(1).getReg();
2288   unsigned FalseReg = MI->getOperand(2).getReg();
2289   unsigned CCValid  = MI->getOperand(3).getImm();
2290   unsigned CCMask   = MI->getOperand(4).getImm();
2291   DebugLoc DL       = MI->getDebugLoc();
2294   MachineBasicBlock *JoinMBB  = splitBlockBefore(MI, MBB);
2315   BuildMI(*MBB, MI, DL, TII->get(SystemZ::PHI), DestReg)
2319   MI->eraseFromParent();
2323 // Implement EmitInstrWithCustomInserter for pseudo CondStore* instruction MI.
2328 SystemZTargetLowering::emitCondStore(MachineInstr *MI,
2334   unsigned SrcReg     = MI->getOperand(0).getReg();
2335   MachineOperand Base = MI->getOperand(1);
2336   int64_t Disp        = MI->getOperand(2).getImm();
2337   unsigned IndexReg   = MI->getOperand(3).getReg();
2338   unsigned CCValid    = MI->getOperand(4).getImm();
2339   unsigned CCMask     = MI->getOperand(5).getImm();
2340   DebugLoc DL         = MI->getDebugLoc();
2350     BuildMI(*MBB, MI, DL, TII->get(STOCOpcode))
2353     MI->eraseFromParent();
2362   MachineBasicBlock *JoinMBB  = splitBlockBefore(MI, MBB);
2382   MI->eraseFromParent();
2387 // or ATOMIC_SWAP{,W} instruction MI.  BinOpcode is the instruction that
2394 SystemZTargetLowering::emitAtomicLoadBinary(MachineInstr *MI,
2406   unsigned Dest        = MI->getOperand(0).getReg();
2407   MachineOperand Base  = earlyUseOperand(MI->getOperand(1));
2408   int64_t Disp         = MI->getOperand(2).getImm();
2409   MachineOperand Src2  = earlyUseOperand(MI->getOperand(3));
2410   unsigned BitShift    = (IsSubWord ? MI->getOperand(4).getReg() : 0);
2411   unsigned NegBitShift = (IsSubWord ? MI->getOperand(5).getReg() : 0);
2412   DebugLoc DL          = MI->getDebugLoc();
2414     BitSize = MI->getOperand(6).getImm();
2438   MachineBasicBlock *DoneMBB  = splitBlockBefore(MI, MBB);
2506   MI->eraseFromParent();
2511 // ATOMIC_LOAD{,W}_{,U}{MIN,MAX} instruction MI.  CompareOpcode is the
2517 SystemZTargetLowering::emitAtomicLoadMinMax(MachineInstr *MI,
2528   unsigned Dest        = MI->getOperand(0).getReg();
2529   MachineOperand Base  = earlyUseOperand(MI->getOperand(1));
2530   int64_t  Disp        = MI->getOperand(2).getImm();
2531   unsigned Src2        = MI->getOperand(3).getReg();
2532   unsigned BitShift    = (IsSubWord ? MI->getOperand(4).getReg() : 0);
2533   unsigned NegBitShift = (IsSubWord ? MI->getOperand(5).getReg() : 0);
2534   DebugLoc DL          = MI->getDebugLoc();
2536     BitSize = MI->getOperand(6).getImm();
2560   MachineBasicBlock *DoneMBB   = splitBlockBefore(MI, MBB);
2624   MI->eraseFromParent();
2629 // instruction MI.
2631 SystemZTargetLowering::emitAtomicCmpSwapW(MachineInstr *MI,
2638   unsigned Dest        = MI->getOperand(0).getReg();
2639   MachineOperand Base  = earlyUseOperand(MI->getOperand(1));
2640   int64_t  Disp        = MI->getOperand(2).getImm();
2641   unsigned OrigCmpVal  = MI->getOperand(3).getReg();
2642   unsigned OrigSwapVal = MI->getOperand(4).getReg();
2643   unsigned BitShift    = MI->getOperand(5).getReg();
2644   unsigned NegBitShift = MI->getOperand(6).getReg();
2645   int64_t  BitSize     = MI->getOperand(7).getImm();
2646   DebugLoc DL          = MI->getDebugLoc();
2667   MachineBasicBlock *DoneMBB  = splitBlockBefore(MI, MBB);
2737   MI->eraseFromParent();
2746 SystemZTargetLowering::emitExt128(MachineInstr *MI,
2752   DebugLoc DL = MI->getDebugLoc();
2754   unsigned Dest  = MI->getOperand(0).getReg();
2755   unsigned Src   = MI->getOperand(1).getReg();
2758   BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::IMPLICIT_DEF), In128);
2763     BuildMI(*MBB, MI, DL, TII->get(SystemZ::LLILL), Zero64)
2765     BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::INSERT_SUBREG), NewIn128)
2769   BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::INSERT_SUBREG), Dest)
2772   MI->eraseFromParent();
2777 SystemZTargetLowering::emitMemMemWrapper(MachineInstr *MI,
2783   DebugLoc DL = MI->getDebugLoc();
2785   MachineOperand DestBase = earlyUseOperand(MI->getOperand(0));
2786   uint64_t       DestDisp = MI->getOperand(1).getImm();
2787   MachineOperand SrcBase  = earlyUseOperand(MI->getOperand(2));
2788   uint64_t       SrcDisp  = MI->getOperand(3).getImm();
2789   uint64_t       Length   = MI->getOperand(4).getImm();
2794                                splitBlockAfter(MI, MBB) : 0);
2797   if (MI->getNumExplicitOperands() > 5) {
2800     uint64_t StartCountReg = MI->getOperand(5).getReg();
2801     uint64_t StartSrcReg   = forceReg(MI, SrcBase, TII);
2803                               forceReg(MI, DestBase, TII));
2818     MachineBasicBlock *DoneMBB = splitBlockBefore(MI, MBB);
2903       BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(SystemZ::LAY), Reg)
2910       BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(SystemZ::LAY), Reg)
2915     BuildMI(*MBB, MI, DL, TII->get(Opcode))
2924       MachineBasicBlock *NextMBB = splitBlockBefore(MI, MBB);
2939   MI->eraseFromParent();
2943 // Decompose string pseudo-instruction MI into a loop that continually performs
2946 SystemZTargetLowering::emitStringWrapper(MachineInstr *MI,
2952   DebugLoc DL = MI->getDebugLoc();
2954   uint64_t End1Reg   = MI->getOperand(0).getReg();
2955   uint64_t Start1Reg = MI->getOperand(1).getReg();
2956   uint64_t Start2Reg = MI->getOperand(2).getReg();
2957   uint64_t CharReg   = MI->getOperand(3).getReg();
2965   MachineBasicBlock *DoneMBB = splitBlockBefore(MI, MBB);
3000   MI->eraseFromParent();
3005 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const {
3006   switch (MI->getOpcode()) {
3013     return emitSelect(MI, MBB);
3016     return emitCondStore(MI, MBB, SystemZ::STCMux, 0, false);
3018     return emitCondStore(MI, MBB, SystemZ::STCMux, 0, true);
3020     return emitCondStore(MI, MBB, SystemZ::STHMux, 0, false);
3022     return emitCondStore(MI, MBB, SystemZ::STHMux, 0, true);
3024     return emitCondStore(MI, MBB, SystemZ::STC, 0, false);
3026     return emitCondStore(MI, MBB, SystemZ::STC, 0, true);
3028     return emitCondStore(MI, MBB, SystemZ::STH, 0, false);
3030     return emitCondStore(MI, MBB, SystemZ::STH, 0, true);
3032     return emitCondStore(MI, MBB, SystemZ::ST, SystemZ::STOC, false);
3034     return emitCondStore(MI, MBB, SystemZ::ST, SystemZ::STOC, true);
3036     return emitCondStore(MI, MBB, SystemZ::STG, SystemZ::STOCG, false);
3038     return emitCondStore(MI, MBB, SystemZ::STG, SystemZ::STOCG, true);
3040     return emitCondStore(MI, MBB, SystemZ::STE, 0, false);
3042     return emitCondStore(MI, MBB, SystemZ::STE, 0, true);
3044     return emitCondStore(MI, MBB, SystemZ::STD, 0, false);
3046     return emitCondStore(MI, MBB, SystemZ::STD, 0, true);
3049     return emitExt128(MI, MBB, false, SystemZ::subreg_l64);
3051     return emitExt128(MI, MBB, true, SystemZ::subreg_l32);
3053     return emitExt128(MI, MBB, true, SystemZ::subreg_l64);
3056     return emitAtomicLoadBinary(MI, MBB, 0, 0);
3058     return emitAtomicLoadBinary(MI, MBB, 0, 32);
3060     return emitAtomicLoadBinary(MI, MBB, 0, 64);
3063     return emitAtomicLoadBinary(MI, MBB, SystemZ::AR, 0);
3065     return emitAtomicLoadBinary(MI, MBB, SystemZ::AFI, 0);
3067     return emitAtomicLoadBinary(MI, MBB, SystemZ::AR, 32);
3069     return emitAtomicLoadBinary(MI, MBB, SystemZ::AHI, 32);
3071     return emitAtomicLoadBinary(MI, MBB, SystemZ::AFI, 32);
3073     return emitAtomicLoadBinary(MI, MBB, SystemZ::AGR, 64);
3075     return emitAtomicLoadBinary(MI, MBB, SystemZ::AGHI, 64);
3077     return emitAtomicLoadBinary(MI, MBB, SystemZ::AGFI, 64);
3080     return emitAtomicLoadBinary(MI, MBB, SystemZ::SR, 0);
3082     return emitAtomicLoadBinary(MI, MBB, SystemZ::SR, 32);
3084     return emitAtomicLoadBinary(MI, MBB, SystemZ::SGR, 64);
3087     return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 0);
3089     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 0);
3091     return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 32);
3093     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL, 32);
3095     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 32);
3097     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF, 32);
3099     return emitAtomicLoadBinary(MI, MBB, SystemZ::NGR, 64);
3101     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL64, 64);
3103     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH64, 64);
3105     return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHL64, 64);
3107     return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHH64, 64);
3109     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF64, 64);
3111     return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHF64, 64);
3114     return emitAtomicLoadBinary(MI, MBB, SystemZ::OR, 0);
3116     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH, 0);
3118     return emitAtomicLoadBinary(MI, MBB, SystemZ::OR, 32);
3120     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILL, 32);
3122     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH, 32);
3124     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILF, 32);
3126     return emitAtomicLoadBinary(MI, MBB, SystemZ::OGR, 64);
3128     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILL64, 64);
3130     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH64, 64);
3132     return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHL64, 64);
3134     return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHH64, 64);
3136     return emitAtomicLoadBinary(MI, MBB, SystemZ::OILF64, 64);
3138     return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHF64, 64);
3141     return emitAtomicLoadBinary(MI, MBB, SystemZ::XR, 0);
3143     return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF, 0);
3145     return emitAtomicLoadBinary(MI, MBB, SystemZ::XR, 32);
3147     return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF, 32);
3149     return emitAtomicLoadBinary(MI, MBB, SystemZ::XGR, 64);
3151     return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF64, 64);
3153     return emitAtomicLoadBinary(MI, MBB, SystemZ::XIHF64, 64);
3156     return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 0, true);
3158     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 0, true);
3160     return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 32, true);
3162     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL, 32, true);
3164     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 32, true);
3166     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF, 32, true);
3168     return emitAtomicLoadBinary(MI, MBB, SystemZ::NGR, 64, true);
3170     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL64, 64, true);
3172     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH64, 64, true);
3174     return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHL64, 64, true);
3176     return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHH64, 64, true);
3178     return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF64, 64, true);
3180     return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHF64, 64, true);
3183     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3186     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3189     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CGR,
3193     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3196     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3199     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CGR,
3203     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3206     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3209     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLGR,
3213     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3216     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3219     return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLGR,
3223     return emitAtomicCmpSwapW(MI, MBB);
3226     return emitMemMemWrapper(MI, MBB, SystemZ::MVC);
3229     return emitMemMemWrapper(MI, MBB, SystemZ::NC);
3232     return emitMemMemWrapper(MI, MBB, SystemZ::OC);
3235     return emitMemMemWrapper(MI, MBB, SystemZ::XC);
3238     return emitMemMemWrapper(MI, MBB, SystemZ::CLC);
3240     return emitStringWrapper(MI, MBB, SystemZ::CLST);
3242     return emitStringWrapper(MI, MBB, SystemZ::MVST);
3244     return emitStringWrapper(MI, MBB, SystemZ::SRST);