Target/R600/R600ISelLowering.cpp

128     MachineInstr * MI, MachineBasicBlock * BB) const {
131   MachineBasicBlock::iterator I = *MI;
135   switch (MI->getOpcode()) {
139     if (TII->isLDSRetInstr(MI->getOpcode())) {
140       int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst);
143       if (!MRI.use_empty(MI->getOperand(DstIdx).getReg()))
147                       TII->get(AMDGPU::getLDSNoRetOp(MI->getOpcode())));
148       for (unsigned i = 1, e = MI->getNumOperands(); i < e; ++i) {
149         NewMI.addOperand(MI->getOperand(i));
152       return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
158                                                    MI->getOperand(0).getReg(),
159                                                    MI->getOperand(1).getReg());
167                                                     MI->getOperand(0).getReg(),
168                                                     MI->getOperand(1).getReg());
176                                                     MI->getOperand(0).getReg(),
177                                                     MI->getOperand(1).getReg());
183     unsigned maskedRegister = MI->getOperand(0).getReg();
191     TII->buildMovImm(*BB, I, MI->getOperand(0).getReg(),
192                      MI->getOperand(1).getFPImm()->getValueAPF()
196     TII->buildMovImm(*BB, I, MI->getOperand(0).getReg(),
197                      MI->getOperand(1).getImm());
200     MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, MI, AMDGPU::MOV,
201         MI->getOperand(0).getReg(), AMDGPU::ALU_CONST);
203         MI->getOperand(1).getImm());
212     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
213             .addOperand(MI->getOperand(0))
214             .addOperand(MI->getOperand(1))
222     MachineOperand &RID = MI->getOperand(4);
223     MachineOperand &SID = MI->getOperand(5);
224     unsigned TextureId = MI->getOperand(6).getImm();
258             .addOperand(MI->getOperand(3))
277             .addOperand(MI->getOperand(2))
296             .addOperand(MI->getOperand(0))
297             .addOperand(MI->getOperand(1))
323     MachineOperand &RID = MI->getOperand(4);
324     MachineOperand &SID = MI->getOperand(5);
325     unsigned TextureId = MI->getOperand(6).getImm();
360             .addOperand(MI->getOperand(3))
379             .addOperand(MI->getOperand(2))
398             .addOperand(MI->getOperand(0))
399             .addOperand(MI->getOperand(1))
424               .addOperand(MI->getOperand(0));
431               .addOperand(MI->getOperand(1))
436             .addOperand(MI->getOperand(0))
445             .addOperand(MI->getOperand(1))
450            .addOperand(MI->getOperand(0))
459     unsigned InstExportType = MI->getOperand(1).getImm();
476     unsigned CfInst = (MI->getOpcode() == AMDGPU::EG_ExportSwz)? 84 : 40;
477     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
478             .addOperand(MI->getOperand(0))
479             .addOperand(MI->getOperand(1))
480             .addOperand(MI->getOperand(2))
481             .addOperand(MI->getOperand(3))
482             .addOperand(MI->getOperand(4))
483             .addOperand(MI->getOperand(5))
484             .addOperand(MI->getOperand(6))
493     MachineInstrBuilder MIB(*MF, MI);
500   MI->eraseFromParent();