Target/AArch64/AArch64ISelLowering.cpp

432 AArch64TargetLowering::emitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
443   unsigned dest = MI->getOperand(0).getReg();
444   unsigned ptr = MI->getOperand(1).getReg();
445   unsigned incr = MI->getOperand(2).getReg();
446   AtomicOrdering Ord = static_cast<AtomicOrdering>(MI->getOperand(3).getImm());
447   DebugLoc dl = MI->getDebugLoc();
461                   llvm::next(MachineBasicBlock::iterator(MI)),
510   MI->eraseFromParent();   // The instruction is gone now.
516 AArch64TargetLowering::emitAtomicBinaryMinMax(MachineInstr *MI,
528   unsigned dest = MI->getOperand(0).getReg();
529   unsigned ptr = MI->getOperand(1).getReg();
530   unsigned incr = MI->getOperand(2).getReg();
531   AtomicOrdering Ord = static_cast<AtomicOrdering>(MI->getOperand(3).getImm());
534   DebugLoc dl = MI->getDebugLoc();
556                   llvm::next(MachineBasicBlock::iterator(MI)),
602   MI->eraseFromParent();   // The instruction is gone now.
608 AArch64TargetLowering::emitAtomicCmpSwap(MachineInstr *MI,
611   unsigned dest    = MI->getOperand(0).getReg();
612   unsigned ptr     = MI->getOperand(1).getReg();
613   unsigned oldval  = MI->getOperand(2).getReg();
614   unsigned newval  = MI->getOperand(3).getReg();
615   AtomicOrdering Ord = static_cast<AtomicOrdering>(MI->getOperand(4).getImm());
617   DebugLoc dl = MI->getDebugLoc();
640                   llvm::next(MachineBasicBlock::iterator(MI)),
682   MI->eraseFromParent();   // The instruction is gone now.
688 AArch64TargetLowering::EmitF128CSEL(MachineInstr *MI,
716   DebugLoc DL = MI->getDebugLoc();
720   unsigned DestReg = MI->getOperand(0).getReg();
721   unsigned IfTrueReg = MI->getOperand(1).getReg();
722   unsigned IfFalseReg = MI->getOperand(2).getReg();
723   unsigned CondCode = MI->getOperand(3).getImm();
724   bool NZCVKilled = MI->getOperand(4).isKill();
733                 llvm::next(MachineBasicBlock::iterator(MI)),
781   MI->eraseFromParent();
786 AArch64TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
788   switch (MI->getOpcode()) {
791     return EmitF128CSEL(MI, MBB);
793     return emitAtomicBinary(MI, MBB, 1, AArch64::ADDwww_lsl);
795     return emitAtomicBinary(MI, MBB, 2, AArch64::ADDwww_lsl);
797     return emitAtomicBinary(MI, MBB, 4, AArch64::ADDwww_lsl);
799     return emitAtomicBinary(MI, MBB, 8, AArch64::ADDxxx_lsl);
802     return emitAtomicBinary(MI, MBB, 1, AArch64::SUBwww_lsl);
804     return emitAtomicBinary(MI, MBB, 2, AArch64::SUBwww_lsl);
806     return emitAtomicBinary(MI, MBB, 4, AArch64::SUBwww_lsl);
808     return emitAtomicBinary(MI, MBB, 8, AArch64::SUBxxx_lsl);
811     return emitAtomicBinary(MI, MBB, 1, AArch64::ANDwww_lsl);
813     return emitAtomicBinary(MI, MBB, 2, AArch64::ANDwww_lsl);
815     return emitAtomicBinary(MI, MBB, 4, AArch64::ANDwww_lsl);
817     return emitAtomicBinary(MI, MBB, 8, AArch64::ANDxxx_lsl);
820     return emitAtomicBinary(MI, MBB, 1, AArch64::ORRwww_lsl);
822     return emitAtomicBinary(MI, MBB, 2, AArch64::ORRwww_lsl);
824     return emitAtomicBinary(MI, MBB, 4, AArch64::ORRwww_lsl);
826     return emitAtomicBinary(MI, MBB, 8, AArch64::ORRxxx_lsl);
829     return emitAtomicBinary(MI, MBB, 1, AArch64::EORwww_lsl);
831     return emitAtomicBinary(MI, MBB, 2, AArch64::EORwww_lsl);
833     return emitAtomicBinary(MI, MBB, 4, AArch64::EORwww_lsl);
835     return emitAtomicBinary(MI, MBB, 8, AArch64::EORxxx_lsl);
838     return emitAtomicBinary(MI, MBB, 1, AArch64::BICwww_lsl);
840     return emitAtomicBinary(MI, MBB, 2, AArch64::BICwww_lsl);
842     return emitAtomicBinary(MI, MBB, 4, AArch64::BICwww_lsl);
844     return emitAtomicBinary(MI, MBB, 8, AArch64::BICxxx_lsl);
847     return emitAtomicBinaryMinMax(MI, MBB, 1, AArch64::CMPww_sxtb, A64CC::GT);
849     return emitAtomicBinaryMinMax(MI, MBB, 2, AArch64::CMPww_sxth, A64CC::GT);
851     return emitAtomicBinaryMinMax(MI, MBB, 4, AArch64::CMPww_lsl, A64CC::GT);
853     return emitAtomicBinaryMinMax(MI, MBB, 8, AArch64::CMPxx_lsl, A64CC::GT);
856     return emitAtomicBinaryMinMax(MI, MBB, 1, AArch64::CMPww_sxtb, A64CC::LT);
858     return emitAtomicBinaryMinMax(MI, MBB, 2, AArch64::CMPww_sxth, A64CC::LT);
860     return emitAtomicBinaryMinMax(MI, MBB, 4, AArch64::CMPww_lsl, A64CC::LT);
862     return emitAtomicBinaryMinMax(MI, MBB, 8, AArch64::CMPxx_lsl, A64CC::LT);
865     return emitAtomicBinaryMinMax(MI, MBB, 1, AArch64::CMPww_uxtb, A64CC::HI);
867     return emitAtomicBinaryMinMax(MI, MBB, 2, AArch64::CMPww_uxth, A64CC::HI);
869     return emitAtomicBinaryMinMax(MI, MBB, 4, AArch64::CMPww_lsl, A64CC::HI);
871     return emitAtomicBinaryMinMax(MI, MBB, 8, AArch64::CMPxx_lsl, A64CC::HI);
874     return emitAtomicBinaryMinMax(MI, MBB, 1, AArch64::CMPww_uxtb, A64CC::LO);
876     return emitAtomicBinaryMinMax(MI, MBB, 2, AArch64::CMPww_uxth, A64CC::LO);
878     return emitAtomicBinaryMinMax(MI, MBB, 4, AArch64::CMPww_lsl, A64CC::LO);
880     return emitAtomicBinaryMinMax(MI, MBB, 8, AArch64::CMPxx_lsl, A64CC::LO);
883     return emitAtomicBinary(MI, MBB, 1, 0);
885     return emitAtomicBinary(MI, MBB, 2, 0);
887     return emitAtomicBinary(MI, MBB, 4, 0);
889     return emitAtomicBinary(MI, MBB, 8, 0);
892     return emitAtomicCmpSwap(MI, MBB, 1);
894     return emitAtomicCmpSwap(MI, MBB, 2);
896     return emitAtomicCmpSwap(MI, MBB, 4);
898     return emitAtomicCmpSwap(MI, MBB, 8);
1881   case ISD::SETOLT: CondCode = A64CC::MI; break;
1883   case ISD::SETONE: CondCode = A64CC::MI; Alternative = A64CC::GT; break;