lib/CodeGen/TwoAddressInstructionPass.cpp

109                           unsigned RegB, unsigned RegC, unsigned Dist);
111   bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
115                           unsigned RegA, unsigned RegB, unsigned Dist);
495 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
496   if (RegA == RegB)
498   if (!RegA || !RegB)
500   return TRI->regsOverlap(RegA, RegB);
576                    unsigned RegB, unsigned RegC, unsigned Dist) {
604 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){
611   unsigned FromRegB = getMappedReg(RegB, SrcRegMap);
623                                               unsigned RegA, unsigned RegB,
639   if (NewMI->findRegisterUseOperand(RegB, false, TRI))
641     // uses RegB, convertToThreeAddress must have created more
643     Sunk = sink3AddrInstruction(NewMI, RegB, mi);
655   DstRegMap.erase(RegB);
1351   unsigned RegB = 0;
1359     // Grab RegB from the instruction because it may have changed if the
1361     RegB = MI->getOperand(SrcIdx).getReg();
1363     if (RegA == RegB) {
1372     assert(TargetRegisterInfo::isVirtualRegister(RegB) &&
1387             TII->get(TargetOpcode::COPY), RegA).addReg(RegB);
1410     assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&
1419         TargetRegisterInfo::isVirtualRegister(RegB))
1420       MRI->constrainRegClass(RegA, MRI->getRegClass(RegB));
1425     SrcRegMap[RegA] = RegB;
1434         if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {
1445     if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(MI)) {
1448       LV->addVirtualRegisterKilled(RegB, PrevMI);
1453       LiveInterval &LI = LIS->getInterval(RegB);
1456       assert(I != LI.end() && "RegB must be live-in to use.");
1470       if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {