Lines Matching refs:temp
1947 mips_split_symbol (rtx temp, rtx addr)
1954 high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr)));
1982 mips_unspec_offset_high (rtx temp, rtx base, rtx addr,
1988 addr = mips_force_temporary (temp, addr);
1989 return mips_force_temporary (temp, gen_rtx_PLUS (Pmode, addr, base));
2000 mips_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset)
2018 high = mips_force_temporary (temp, high);
2019 reg = mips_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg));
2283 mips_move_integer (rtx dest, rtx temp, unsigned HOST_WIDE_INT value)
2300 emit_insn (gen_rtx_SET (VOIDmode, temp, x));
2301 x = temp;
3310 (set temp (COND:CCV2 CMP_OP0 CMP_OP1))
3311 (set DEST (unspec [TRUE_SRC FALSE_SRC temp] UNSPEC_MOVE_TF_PS)) */
4561 rtx left, right, temp;
4580 temp = gen_reg_rtx (GET_MODE (dest));
4583 emit_insn (gen_mov_ldl (temp, src, left));
4584 emit_insn (gen_mov_ldr (dest, copy_rtx (src), right, temp));
4588 emit_insn (gen_mov_lwl (temp, src, left));
4589 emit_insn (gen_mov_lwr (dest, copy_rtx (src), right, temp));
5044 register int temp;
5047 temp = (ISA_HAS_8CC
5052 temp = (ISA_HAS_8CC
5059 temp = (regno == FPSW_REGNUM);
5061 temp = (ST_REG_P (regno) || GP_REG_P (regno)
5066 temp = ((regno & 1) == 0 || size <= UNITS_PER_WORD);
5069 temp = ((regno % FP_INC) == 0)
5086 temp = (INTEGRAL_MODE_P (mode)
5092 temp = (class == MODE_INT && size <= UNITS_PER_WORD);
5094 temp = 0;
5096 mips_hard_regno_mode_ok[(int)mode][regno] = temp;