dev/isp/isp.c

1500 	int tgt;
1520 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
1524 		if (sdp->isp_devparam[tgt].dev_enable == 0) {
1528 		sdf = sdp->isp_devparam[tgt].goal_flags;
1548 		sdp->isp_devparam[tgt].goal_flags = sdf = DPARM_DEFAULT;
1551 		mbs.param[1] = (chan << 15) | (tgt << 8);
1557 			    (sdp->isp_devparam[tgt].goal_offset << 8) |
1558 			    (sdp->isp_devparam[tgt].goal_period);
1560 		isp_prt(isp, ISP_LOGDEBUG0, "Initial Settings bus%d tgt%d flags 0x%x off 0x%x per 0x%x",
1561 		    chan, tgt, mbs.param[2], mbs.param[3] >> 8, mbs.param[3] & 0xff);
1566 			mbs.param[1] = (tgt << 8) | (chan << 15);
1586 		sdp->isp_devparam[tgt].actv_flags = sdf & ~DPARM_TQING;
1589 			mbs.param[1] = (chan << 15) | (tgt << 8) | lun;
1591 			mbs.param[3] = sdp->isp_devparam[tgt].exc_throttle;
1598 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
1599 		if (sdp->isp_devparam[tgt].dev_refresh) {
4641 	int chan, tgt;
4678 		tgt = va_arg(ap, int);
4688 			hdlidx = fcp->isp_dev_map[tgt] - 1;
4690 				isp_prt(isp, ISP_LOGWARN, "Chan %d bad handle %d trying to reset target %d", chan, hdlidx, tgt);
4695 				isp_prt(isp, ISP_LOGWARN, "Chan %d handle %d for abort of target %d no longer valid", chan, hdlidx, tgt);
4737 			isp_prt(isp, ISP_LOGWARN, "Chan %d reset of target %d returned 0x%x", chan, tgt, sp->req_completion_status);
4741 				mbs.param[1] = tgt;
4744 				mbs.param[1] = (tgt << 8);
4747 			mbs.param[1] = (chan << 15) | (tgt << 8);
4755 		isp_prt(isp, ISP_LOGINFO, "Target %d on Bus %d Reset Succeeded", tgt, chan);
4764 		tgt = XS_TGT(xs);
4779 			hdlidx = fcp->isp_dev_map[tgt] - 1;
4781 				isp_prt(isp, ISP_LOGWARN, "Chan %d bad handle %d trying to abort target %d", chan, hdlidx, tgt);
4786 				isp_prt(isp, ISP_LOGWARN, "Chan %d handle %d for abort of target %d no longer valid", chan, hdlidx, tgt);
4831 					mbs.param[1] = tgt;
4833 					mbs.param[1] = tgt << 8;
4837 				mbs.param[1] = tgt << 8 | XS_LUN(xs);
4840 			mbs.param[1] = (chan << 15) | (tgt << 8) | XS_LUN(xs);
4922 			tgt = va_arg(ap, int);
4925 			return (isp_getpdb(isp, chan, tgt, pdb, 1));
4934 		tgt = va_arg(ap, int);
4942 			*wwnn = isp_get_wwn(isp, chan, tgt, 1);
4948 			*wwnp = isp_get_wwn(isp, chan, tgt, 0);
7532 	int tgt;
7545 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7549 		if (sdp->isp_devparam[tgt].dev_enable == 0) {
7550 			sdp->isp_devparam[tgt].dev_update = 0;
7551 			sdp->isp_devparam[tgt].dev_refresh = 0;
7552 			isp_prt(isp, ISP_LOGDEBUG0, "skipping target %d bus %d update", tgt, chan);
7567 		if (sdp->isp_devparam[tgt].dev_refresh) {
7570 		} else if (sdp->isp_devparam[tgt].dev_update) {
7577 			sdp->isp_devparam[tgt].goal_flags |= DPARM_RENEG;
7578 			sdp->isp_devparam[tgt].goal_flags &= ~DPARM_QFRZ;
7579 			mbs.param[2] = sdp->isp_devparam[tgt].goal_flags;
7591 				    (sdp->isp_devparam[tgt].goal_offset << 8) |
7592 				    (sdp->isp_devparam[tgt].goal_period);
7605 			sdp->isp_devparam[tgt].actv_flags &= ~DPARM_TQING;
7606 			sdp->isp_devparam[tgt].actv_flags |=
7607 			    (sdp->isp_devparam[tgt].goal_flags & DPARM_TQING);
7608 			isp_prt(isp, ISP_LOGDEBUG0, "bus %d set tgt %d flags 0x%x off 0x%x period 0x%x",
7609 			    chan, tgt, mbs.param[2], mbs.param[3] >> 8, mbs.param[3] & 0xff);
7614 		mbs.param[1] = (chan << 15) | (tgt << 8);
7621 			sdp->isp_devparam[tgt].dev_update = 0;
7622 			sdp->isp_devparam[tgt].dev_refresh = 1;
7624 			sdp->isp_devparam[tgt].dev_refresh = 0;
7628 			sdp->isp_devparam[tgt].actv_flags = flags;
7629 			sdp->isp_devparam[tgt].actv_period = period;
7630 			sdp->isp_devparam[tgt].actv_offset = offset;
7631 			isp_async(isp, ISPASYNC_NEW_TGT_PARAMS, chan, tgt);
7635 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7636 		if (sdp->isp_devparam[tgt].dev_update ||
7637 		    sdp->isp_devparam[tgt].dev_refresh) {
7647 	int tgt;
7682 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7683 		sdp->isp_devparam[tgt].exc_throttle = ISP_EXEC_THROTTLE;
7684 		sdp->isp_devparam[tgt].dev_enable = 1;
7693 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
7695 		sdp->isp_devparam[tgt].actv_offset = 0;
7696 		sdp->isp_devparam[tgt].actv_period = 0;
7697 		sdp->isp_devparam[tgt].actv_flags = 0;
7699 		sdp->isp_devparam[tgt].goal_flags =
7700 		    sdp->isp_devparam[tgt].nvrm_flags = DPARM_DEFAULT;
7727 		sdp->isp_devparam[tgt].goal_offset =
7728 		    sdp->isp_devparam[tgt].nvrm_offset = off;
7729 		sdp->isp_devparam[tgt].goal_period =
7730 		    sdp->isp_devparam[tgt].nvrm_period = per;
8123 	int tgt;
8177 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
8178 		sdp->isp_devparam[tgt].dev_enable =
8179 			ISP_NVRAM_TGT_DEVICE_ENABLE(nvram_data, tgt);
8180 		sdp->isp_devparam[tgt].exc_throttle =
8181 			ISP_NVRAM_TGT_EXEC_THROTTLE(nvram_data, tgt);
8182 		sdp->isp_devparam[tgt].nvrm_offset =
8183 			ISP_NVRAM_TGT_SYNC_OFFSET(nvram_data, tgt);
8184 		sdp->isp_devparam[tgt].nvrm_period =
8185 			ISP_NVRAM_TGT_SYNC_PERIOD(nvram_data, tgt);
8196 			if (sdp->isp_devparam[tgt].nvrm_period < 0x19) {
8197 				sdp->isp_devparam[tgt].nvrm_period = 0x19;
8199 			if (sdp->isp_devparam[tgt].nvrm_offset > 0xc) {
8200 				sdp->isp_devparam[tgt].nvrm_offset = 0x0c;
8203 			if (sdp->isp_devparam[tgt].nvrm_offset > 0x8) {
8204 				sdp->isp_devparam[tgt].nvrm_offset = 0x8;
8207 		sdp->isp_devparam[tgt].nvrm_flags = 0;
8208 		if (ISP_NVRAM_TGT_RENEG(nvram_data, tgt))
8209 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_RENEG;
8210 		sdp->isp_devparam[tgt].nvrm_flags |= DPARM_ARQ;
8211 		if (ISP_NVRAM_TGT_TQING(nvram_data, tgt))
8212 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_TQING;
8213 		if (ISP_NVRAM_TGT_SYNC(nvram_data, tgt))
8214 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_SYNC;
8215 		if (ISP_NVRAM_TGT_WIDE(nvram_data, tgt))
8216 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_WIDE;
8217 		if (ISP_NVRAM_TGT_PARITY(nvram_data, tgt))
8218 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_PARITY;
8219 		if (ISP_NVRAM_TGT_DISC(nvram_data, tgt))
8220 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_DISC;
8221 		sdp->isp_devparam[tgt].actv_flags = 0; /* we don't know */
8222 		sdp->isp_devparam[tgt].goal_offset =
8223 		    sdp->isp_devparam[tgt].nvrm_offset;
8224 		sdp->isp_devparam[tgt].goal_period =
8225 		    sdp->isp_devparam[tgt].nvrm_period;
8226 		sdp->isp_devparam[tgt].goal_flags =
8227 		    sdp->isp_devparam[tgt].nvrm_flags;
8235 	int tgt;
8273 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
8274 		sdp->isp_devparam[tgt].dev_enable =
8275 		    ISP1080_NVRAM_TGT_DEVICE_ENABLE(nvram_data, tgt, bus);
8276 		sdp->isp_devparam[tgt].exc_throttle =
8277 			ISP1080_NVRAM_TGT_EXEC_THROTTLE(nvram_data, tgt, bus);
8278 		sdp->isp_devparam[tgt].nvrm_offset =
8279 			ISP1080_NVRAM_TGT_SYNC_OFFSET(nvram_data, tgt, bus);
8280 		sdp->isp_devparam[tgt].nvrm_period =
8281 			ISP1080_NVRAM_TGT_SYNC_PERIOD(nvram_data, tgt, bus);
8282 		sdp->isp_devparam[tgt].nvrm_flags = 0;
8283 		if (ISP1080_NVRAM_TGT_RENEG(nvram_data, tgt, bus))
8284 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_RENEG;
8285 		sdp->isp_devparam[tgt].nvrm_flags |= DPARM_ARQ;
8286 		if (ISP1080_NVRAM_TGT_TQING(nvram_data, tgt, bus))
8287 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_TQING;
8288 		if (ISP1080_NVRAM_TGT_SYNC(nvram_data, tgt, bus))
8289 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_SYNC;
8290 		if (ISP1080_NVRAM_TGT_WIDE(nvram_data, tgt, bus))
8291 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_WIDE;
8292 		if (ISP1080_NVRAM_TGT_PARITY(nvram_data, tgt, bus))
8293 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_PARITY;
8294 		if (ISP1080_NVRAM_TGT_DISC(nvram_data, tgt, bus))
8295 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_DISC;
8296 		sdp->isp_devparam[tgt].actv_flags = 0;
8297 		sdp->isp_devparam[tgt].goal_offset =
8298 		    sdp->isp_devparam[tgt].nvrm_offset;
8299 		sdp->isp_devparam[tgt].goal_period =
8300 		    sdp->isp_devparam[tgt].nvrm_period;
8301 		sdp->isp_devparam[tgt].goal_flags =
8302 		    sdp->isp_devparam[tgt].nvrm_flags;
8310 	int tgt;
8348 	for (tgt = 0; tgt < MAX_TARGETS; tgt++) {
8349 		sdp->isp_devparam[tgt].dev_enable =
8350 		    ISP12160_NVRAM_TGT_DEVICE_ENABLE(nvram_data, tgt, bus);
8351 		sdp->isp_devparam[tgt].exc_throttle =
8352 			ISP12160_NVRAM_TGT_EXEC_THROTTLE(nvram_data, tgt, bus);
8353 		sdp->isp_devparam[tgt].nvrm_offset =
8354 			ISP12160_NVRAM_TGT_SYNC_OFFSET(nvram_data, tgt, bus);
8355 		sdp->isp_devparam[tgt].nvrm_period =
8356 			ISP12160_NVRAM_TGT_SYNC_PERIOD(nvram_data, tgt, bus);
8357 		sdp->isp_devparam[tgt].nvrm_flags = 0;
8358 		if (ISP12160_NVRAM_TGT_RENEG(nvram_data, tgt, bus))
8359 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_RENEG;
8360 		sdp->isp_devparam[tgt].nvrm_flags |= DPARM_ARQ;
8361 		if (ISP12160_NVRAM_TGT_TQING(nvram_data, tgt, bus))
8362 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_TQING;
8363 		if (ISP12160_NVRAM_TGT_SYNC(nvram_data, tgt, bus))
8364 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_SYNC;
8365 		if (ISP12160_NVRAM_TGT_WIDE(nvram_data, tgt, bus))
8366 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_WIDE;
8367 		if (ISP12160_NVRAM_TGT_PARITY(nvram_data, tgt, bus))
8368 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_PARITY;
8369 		if (ISP12160_NVRAM_TGT_DISC(nvram_data, tgt, bus))
8370 			sdp->isp_devparam[tgt].nvrm_flags |= DPARM_DISC;
8371 		sdp->isp_devparam[tgt].actv_flags = 0;
8372 		sdp->isp_devparam[tgt].goal_offset =
8373 		    sdp->isp_devparam[tgt].nvrm_offset;
8374 		sdp->isp_devparam[tgt].goal_period =
8375 		    sdp->isp_devparam[tgt].nvrm_period;
8376 		sdp->isp_devparam[tgt].goal_flags =
8377 		    sdp->isp_devparam[tgt].nvrm_flags;