Lines Matching refs:WR
216 * HW allows up to 4 descriptors to be combined into a WR.
360 panic("trying to coalesce %d packets in to one WR", ci.count);
1169 * packet. Ethernet packets require addition of WR and CPL headers.
1266 * write_wr_hdr_sgl - write a WR header and, optionally, SGL
1274 * @wr_hi: top 32 bits of WR header based on WR type (big endian)
1275 * @wr_lo: low 32 bits of WR header based on WR type (big endian)
1279 * and we just need to write the WR header. Otherwise we distribute the
1419 panic("trying to coalesce %d packets in to one WR", nsegs);
2216 from = (void *)(oh + 1); /* Start of WR within mbuf */
3169 uint32_t *WR, wr_hi, wr_lo, gen;
3211 WR = (uint32_t *)txd->flit;
3212 wr_hi = ntohl(WR[0]);
3213 wr_lo = ntohl(WR[1]);
3220 WR[j], WR[j + 1], WR[j + 2], WR[j + 3]);
3239 uint32_t *WR, wr_hi, wr_lo, gen;
3271 WR = (uint32_t *)txd->flit;
3272 wr_hi = ntohl(WR[0]);
3273 wr_lo = ntohl(WR[1]);
3280 WR[j], WR[j + 1], WR[j + 2], WR[j + 3]);