cxgb/common/cxgb_vsc7323.c

53 int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n)
56 	const struct mdio_ops *mo = adapter_info(adap)->mdio_ops;
58 	ELMR_LOCK(adap);
59 	ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_ADDR, start);
61 		ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_LO,
64 			ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_HI,
67 	ELMR_UNLOCK(adap);
71 static int elmr_write(adapter_t *adap, int addr, u32 val)
73 	return t3_elmr_blk_write(adap, addr, &val, 1);
76 int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n)
80 	const struct mdio_ops *mo = adapter_info(adap)->mdio_ops;
82 	ELMR_LOCK(adap);
84 	ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_ADDR, start);
89 		ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_STAT, &v);
102 		ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_LO, vals);
104 			ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_HI,
109 out:	ELMR_UNLOCK(adap);
113 int t3_vsc7323_init(adapter_t *adap, int nports)
142 		if ((ret = t3_elmr_blk_write(adap, sys_avp[i].reg_addr,
155 		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x10 + i),
157 		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x40 + i),
159 		    (ret = elmr_write(adap, VSC_REG(2, 0, 0x50 + i), 1)) ||
160 		    (ret = elmr_write(adap, VSC_REG(2, 1, 0x10 + i),
162 		    (ret = elmr_write(adap, VSC_REG(2, 1, 0x40 + i),
164 		    (ret = elmr_write(adap, VSC_REG(2, 1, 0x50 + i), 0)))
171 		if ((ret = t3_elmr_blk_write(adap, fifo_avp[i].reg_addr,
176 		if ((ret = t3_elmr_blk_write(adap, xg_avp[i].reg_addr,
181 		if ((ret = elmr_write(adap, VSC_REG(1, i, 0), 0xa59c)) ||
182 		    (ret = elmr_write(adap, VSC_REG(1, i, 5),
184 		    (ret = elmr_write(adap, VSC_REG(1, i, 0xb), 0x96)) ||
185 		    (ret = elmr_write(adap, VSC_REG(1, i, 0x15), 0x21)) ||
186 		    (ret = elmr_write(adap, ELMR_THRES0 + i, 768)))
189 	if ((ret = elmr_write(adap, ELMR_BW, 7)))
195 int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port)
209 		if ((r = elmr_write(adap, VSC_REG(1, port, 0),
211 		    (r = elmr_write(adap, VSC_REG(1, port, 0xb),
213 		    (r = elmr_write(adap, VSC_REG(1, port, 0xb),
215 		    (r = elmr_write(adap, VSC_REG(1, port, 0),
223 	return elmr_write(adap, VSC_REG(1, port, 1), r);
226 int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port)
228 	return elmr_write(adap, VSC_REG(1, port, 2), mtu);
231 int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port)
235 	ret = elmr_write(adap, VSC_REG(1, port, 3),
238 		ret = elmr_write(adap, VSC_REG(1, port, 4),
243 int t3_vsc7323_enable(adapter_t *adap, int port, int which)
248 	ret = t3_elmr_blk_read(adap, VSC_REG(1, port, 0), &v, 1);
256 			ret = elmr_write(adap, VSC_REG(1, port, 0), v);
261 int t3_vsc7323_disable(adapter_t *adap, int port, int which)
266 	ret = t3_elmr_blk_read(adap, VSC_REG(1, port, 0), &v, 1);
274 			ret = elmr_write(adap, VSC_REG(1, port, 0), v);