Lines Matching refs:mac
923 struct bwn_mac *mac;
950 mac = (struct bwn_mac *)malloc(sizeof(*mac), M_DEVBUF,
952 if (mac == NULL)
954 mac->mac_sc = sc;
955 mac->mac_status = BWN_MAC_STATUS_UNINIT;
957 mac->mac_flags |= BWN_MAC_FLAG_BADFRAME_PREEMP;
959 TASK_INIT(&mac->mac_hwreset, 0, bwn_hwreset, mac);
960 TASK_INIT(&mac->mac_intrtask, 0, bwn_intrtask, mac);
961 TASK_INIT(&mac->mac_txpower, 0, bwn_txpwr, mac);
963 error = bwn_attach_core(mac);
966 bwn_led_attach(mac);
971 mac->mac_phy.analog, mac->mac_phy.type, mac->mac_phy.rev,
972 mac->mac_phy.rf_manuf, mac->mac_phy.rf_ver,
973 mac->mac_phy.rf_rev);
974 if (mac->mac_flags & BWN_MAC_FLAG_DMA)
976 mac->mac_method.dma.dmatype);
990 mac->mac_intr_spec = bwn_res_spec_legacy;
995 mac->mac_intr_spec = bwn_res_spec_msi;
996 mac->mac_msi = 1;
1000 error = bus_alloc_resources(dev, mac->mac_intr_spec,
1001 mac->mac_res_irq);
1008 if (mac->mac_msi == 0)
1009 error = bus_setup_intr(dev, mac->mac_res_irq[0],
1010 INTR_TYPE_NET | INTR_MPSAFE, bwn_intr, NULL, mac,
1011 &mac->mac_intrhand[0]);
1014 error = bus_setup_intr(dev, mac->mac_res_irq[i],
1015 INTR_TYPE_NET | INTR_MPSAFE, bwn_intr, NULL, mac,
1016 &mac->mac_intrhand[i]);
1025 TAILQ_INSERT_TAIL(&sc->sc_maclist, mac, mac_list);
1038 free(mac, M_DEVBUF);
1113 bwn_phy_detach(struct bwn_mac *mac)
1116 if (mac->mac_phy.detach != NULL)
1117 mac->mac_phy.detach(mac);
1124 struct bwn_mac *mac = sc->sc_curmac;
1133 bwn_dma_free(mac);
1138 bwn_phy_detach(mac);
1140 ieee80211_draintask(ic, &mac->mac_hwreset);
1141 ieee80211_draintask(ic, &mac->mac_txpower);
1146 taskqueue_drain(sc->sc_tq, &mac->mac_intrtask);
1150 if (mac->mac_intrhand[i] != NULL) {
1151 bus_teardown_intr(dev, mac->mac_res_irq[i],
1152 mac->mac_intrhand[i]);
1153 mac->mac_intrhand[i] = NULL;
1156 bus_release_resources(dev, mac->mac_intr_spec, mac->mac_res_irq);
1157 if (mac->mac_msi != 0)
1291 struct bwn_mac *mac = sc->sc_curmac;
1299 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || mac == NULL ||
1300 mac->mac_status < BWN_MAC_STATUS_STARTED)
1345 struct bwn_mac *mac = sc->sc_curmac;
1348 int pktlen = roundup(m->m_pkthdr.len + BWN_HDRSIZE(mac), 4);
1352 if (mac->mac_flags & BWN_MAC_FLAG_DMA) {
1353 dr = bwn_dma_select(mac, M_WME_GETAC(m));
1360 tq = bwn_pio_select(mac, M_WME_GETAC(m));
1377 struct bwn_mac *mac = sc->sc_curmac;
1382 if (m->m_pkthdr.len < IEEE80211_MIN_LEN || mac == NULL) {
1387 error = (mac->mac_flags & BWN_MAC_FLAG_DMA) ?
1388 bwn_dma_tx_start(mac, ni, m) : bwn_pio_tx_start(mac, ni, m);
1397 bwn_pio_tx_start(struct bwn_mac *mac, struct ieee80211_node *ni, struct mbuf *m)
1400 struct bwn_pio_txqueue *tq = bwn_pio_select(mac, M_WME_GETAC(m));
1401 struct bwn_softc *sc = mac->mac_sc;
1417 error = bwn_set_txhdr(mac, ni, m, &txhdr, BWN_PIO_COOKIE(tq, tp));
1424 tq->tq_used += roundup(m->m_pkthdr.len + BWN_HDRSIZE(mac), 4);
1444 ctl32 = bwn_pio_write_multi_4(mac, tq,
1445 (BWN_PIO_READ_4(mac, tq, BWN_PIO8_TXCTL) |
1447 (const uint8_t *)&txhdr, BWN_HDRSIZE(mac));
1449 ctl32 = bwn_pio_write_multi_4(mac, tq, ctl32,
1451 bwn_pio_write_4(mac, tq, BWN_PIO_TXCTL,
1454 ctl16 = bwn_pio_write_multi_2(mac, tq,
1455 (bwn_pio_read_2(mac, tq, BWN_PIO_TXCTL) |
1457 (const uint8_t *)&txhdr, BWN_HDRSIZE(mac));
1458 ctl16 = bwn_pio_write_mbuf_2(mac, tq, ctl16, m);
1459 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL,
1467 bwn_pio_select(struct bwn_mac *mac, uint8_t prio)
1470 if ((mac->mac_flags & BWN_MAC_FLAG_WME) == 0)
1471 return (&mac->mac_method.pio.wme[WME_AC_BE]);
1475 return (&mac->mac_method.pio.wme[WME_AC_BE]);
1477 return (&mac->mac_method.pio.wme[WME_AC_BK]);
1479 return (&mac->mac_method.pio.wme[WME_AC_VI]);
1481 return (&mac->mac_method.pio.wme[WME_AC_VO]);
1488 bwn_dma_tx_start(struct bwn_mac *mac, struct ieee80211_node *ni, struct mbuf *m)
1491 &(txhdr_cache[(slot / BWN_TX_SLOTS_PER_FRAME) * BWN_HDRSIZE(mac)])
1492 struct bwn_dma *dma = &mac->mac_method.dma;
1493 struct bwn_dma_ring *dr = bwn_dma_select(mac, M_WME_GETAC(m));
1496 struct bwn_softc *sc = mac->mac_sc;
1517 BWN_GET_TXHDRCACHE(slot), BWN_HDRSIZE(mac), bwn_dma_ring_addr,
1526 dr->setdesc(dr, desc, mt->mt_paddr, BWN_HDRSIZE(mac), 1, 0, 0);
1596 bwn_attach_core(struct bwn_mac *mac)
1598 struct bwn_softc *sc = mac->mac_sc;
1608 bwn_reset_core(mac,
1610 error = bwn_phy_getinfo(mac, high);
1620 if (mac->mac_phy.type == BWN_PHYTYPE_A)
1622 else if (mac->mac_phy.type == BWN_PHYTYPE_G ||
1623 mac->mac_phy.type == BWN_PHYTYPE_N ||
1624 mac->mac_phy.type == BWN_PHYTYPE_LP)
1628 mac->mac_phy.type));
1631 if (mac->mac_phy.type != BWN_PHYTYPE_LP &&
1632 mac->mac_phy.type != BWN_PHYTYPE_N) {
1637 if (mac->mac_phy.type == BWN_PHYTYPE_G) {
1638 mac->mac_phy.attach = bwn_phy_g_attach;
1639 mac->mac_phy.detach = bwn_phy_g_detach;
1640 mac->mac_phy.prepare_hw = bwn_phy_g_prepare_hw;
1641 mac->mac_phy.init_pre = bwn_phy_g_init_pre;
1642 mac->mac_phy.init = bwn_phy_g_init;
1643 mac->mac_phy.exit = bwn_phy_g_exit;
1644 mac->mac_phy.phy_read = bwn_phy_g_read;
1645 mac->mac_phy.phy_write = bwn_phy_g_write;
1646 mac->mac_phy.rf_read = bwn_phy_g_rf_read;
1647 mac->mac_phy.rf_write = bwn_phy_g_rf_write;
1648 mac->mac_phy.use_hwpctl = bwn_phy_g_hwpctl;
1649 mac->mac_phy.rf_onoff = bwn_phy_g_rf_onoff;
1650 mac->mac_phy.switch_analog = bwn_phy_switch_analog;
1651 mac->mac_phy.switch_channel = bwn_phy_g_switch_channel;
1652 mac->mac_phy.get_default_chan = bwn_phy_g_get_default_chan;
1653 mac->mac_phy.set_antenna = bwn_phy_g_set_antenna;
1654 mac->mac_phy.set_im = bwn_phy_g_im;
1655 mac->mac_phy.recalc_txpwr = bwn_phy_g_recalc_txpwr;
1656 mac->mac_phy.set_txpwr = bwn_phy_g_set_txpwr;
1657 mac->mac_phy.task_15s = bwn_phy_g_task_15s;
1658 mac->mac_phy.task_60s = bwn_phy_g_task_60s;
1659 } else if (mac->mac_phy.type == BWN_PHYTYPE_LP) {
1660 mac->mac_phy.init_pre = bwn_phy_lp_init_pre;
1661 mac->mac_phy.init = bwn_phy_lp_init;
1662 mac->mac_phy.phy_read = bwn_phy_lp_read;
1663 mac->mac_phy.phy_write = bwn_phy_lp_write;
1664 mac->mac_phy.phy_maskset = bwn_phy_lp_maskset;
1665 mac->mac_phy.rf_read = bwn_phy_lp_rf_read;
1666 mac->mac_phy.rf_write = bwn_phy_lp_rf_write;
1667 mac->mac_phy.rf_onoff = bwn_phy_lp_rf_onoff;
1668 mac->mac_phy.switch_analog = bwn_phy_lp_switch_analog;
1669 mac->mac_phy.switch_channel = bwn_phy_lp_switch_channel;
1670 mac->mac_phy.get_default_chan = bwn_phy_lp_get_default_chan;
1671 mac->mac_phy.set_antenna = bwn_phy_lp_set_antenna;
1672 mac->mac_phy.task_60s = bwn_phy_lp_task_60s;
1675 mac->mac_phy.type);
1680 mac->mac_phy.gmode = have_bg;
1681 if (mac->mac_phy.attach != NULL) {
1682 error = mac->mac_phy.attach(mac);
1689 bwn_reset_core(mac, have_bg ? BWN_TGSLOW_SUPPORT_G : 0);
1691 error = bwn_chiptest(mac);
1694 error = bwn_setup_channels(mac, have_bg, have_a);
1701 sc->sc_curmac = mac;
1703 error = bwn_dma_attach(mac);
1709 mac->mac_phy.switch_analog(mac, 0);
1718 bwn_reset_core(struct bwn_mac *mac, uint32_t flags)
1720 struct bwn_softc *sc = mac->mac_sc;
1737 if (mac->mac_phy.switch_analog != NULL)
1738 mac->mac_phy.switch_analog(mac, 1);
1740 ctl = BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_GMODE;
1743 BWN_WRITE_4(mac, BWN_MACCTL, ctl | BWN_MACCTL_IHR_ON);
1747 bwn_phy_getinfo(struct bwn_mac *mac, int tgshigh)
1749 struct bwn_phy *phy = &mac->mac_phy;
1750 struct bwn_softc *sc = mac->mac_sc;
1754 tmp = BWN_READ_2(mac, BWN_PHYVER);
1777 BWN_WRITE_2(mac, BWN_RFCTL, BWN_RFCTL_ID);
1778 tmp = BWN_READ_2(mac, BWN_RFDATALO);
1779 BWN_WRITE_2(mac, BWN_RFCTL, BWN_RFCTL_ID);
1780 tmp |= (uint32_t)BWN_READ_2(mac, BWN_RFDATAHI) << 16;
1811 bwn_chiptest(struct bwn_mac *mac)
1815 struct bwn_softc *sc = mac->mac_sc;
1820 backup = bwn_shm_read_4(mac, BWN_SHARED, 0);
1822 bwn_shm_write_4(mac, BWN_SHARED, 0, TESTVAL0);
1823 if (bwn_shm_read_4(mac, BWN_SHARED, 0) != TESTVAL0)
1825 bwn_shm_write_4(mac, BWN_SHARED, 0, TESTVAL1);
1826 if (bwn_shm_read_4(mac, BWN_SHARED, 0) != TESTVAL1)
1829 bwn_shm_write_4(mac, BWN_SHARED, 0, backup);
1833 BWN_WRITE_2(mac, BWN_TSF_CFP_START, 0xaaaa);
1834 BWN_WRITE_4(mac, BWN_TSF_CFP_START, 0xccccbbbb);
1835 if (BWN_READ_2(mac, BWN_TSF_CFP_START_LOW) != 0xbbbb)
1837 if (BWN_READ_2(mac, BWN_TSF_CFP_START_HIGH) != 0xcccc)
1840 BWN_WRITE_4(mac, BWN_TSF_CFP_START, 0);
1842 v = BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_GMODE;
1858 bwn_setup_channels(struct bwn_mac *mac, int have_bg, int have_a)
1860 struct bwn_softc *sc = mac->mac_sc;
1870 if (mac->mac_phy.type == BWN_PHYTYPE_N) {
1882 mac->mac_phy.supports_2ghz = have_bg;
1883 mac->mac_phy.supports_5ghz = have_a;
1889 bwn_shm_read_4(struct bwn_mac *mac, uint16_t way, uint16_t offset)
1893 BWN_ASSERT_LOCKED(mac->mac_sc);
1899 bwn_shm_ctlword(mac, way, offset >> 2);
1900 ret = BWN_READ_2(mac, BWN_SHM_DATA_UNALIGNED);
1902 bwn_shm_ctlword(mac, way, (offset >> 2) + 1);
1903 ret |= BWN_READ_2(mac, BWN_SHM_DATA);
1908 bwn_shm_ctlword(mac, way, offset);
1909 ret = BWN_READ_4(mac, BWN_SHM_DATA);
1915 bwn_shm_read_2(struct bwn_mac *mac, uint16_t way, uint16_t offset)
1919 BWN_ASSERT_LOCKED(mac->mac_sc);
1925 bwn_shm_ctlword(mac, way, offset >> 2);
1926 ret = BWN_READ_2(mac, BWN_SHM_DATA_UNALIGNED);
1931 bwn_shm_ctlword(mac, way, offset);
1932 ret = BWN_READ_2(mac, BWN_SHM_DATA);
1939 bwn_shm_ctlword(struct bwn_mac *mac, uint16_t way,
1947 BWN_WRITE_4(mac, BWN_SHM_CONTROL, control);
1951 bwn_shm_write_4(struct bwn_mac *mac, uint16_t way, uint16_t offset,
1954 BWN_ASSERT_LOCKED(mac->mac_sc);
1960 bwn_shm_ctlword(mac, way, offset >> 2);
1961 BWN_WRITE_2(mac, BWN_SHM_DATA_UNALIGNED,
1963 bwn_shm_ctlword(mac, way, (offset >> 2) + 1);
1964 BWN_WRITE_2(mac, BWN_SHM_DATA, value & 0xffff);
1969 bwn_shm_ctlword(mac, way, offset);
1970 BWN_WRITE_4(mac, BWN_SHM_DATA, value);
1974 bwn_shm_write_2(struct bwn_mac *mac, uint16_t way, uint16_t offset,
1977 BWN_ASSERT_LOCKED(mac->mac_sc);
1983 bwn_shm_ctlword(mac, way, offset >> 2);
1984 BWN_WRITE_2(mac, BWN_SHM_DATA_UNALIGNED, value);
1989 bwn_shm_ctlword(mac, way, offset);
1990 BWN_WRITE_2(mac, BWN_SHM_DATA, value);
2055 bwn_phy_g_attach(struct bwn_mac *mac)
2057 struct bwn_softc *sc = mac->mac_sc;
2058 struct bwn_phy *phy = &mac->mac_phy;
2118 bwn_phy_g_detach(struct bwn_mac *mac)
2120 struct bwn_phy_g *pg = &mac->mac_phy.phy_g;
2130 bwn_phy_g_init_pre(struct bwn_mac *mac)
2132 struct bwn_phy *phy = &mac->mac_phy;
2163 bwn_phy_g_prepare_hw(struct bwn_mac *mac)
2165 struct bwn_phy *phy = &mac->mac_phy;
2167 struct bwn_softc *sc = mac->mac_sc;
2295 pg->pg_txctl = (bwn_phy_g_txctl(mac) << 4);
2297 if (!bwn_has_hwpctl(mac)) {
2321 BWN_READ_4(mac, BWN_MACCTL);
2324 bwn_reset_core(mac, 0);
2325 bwn_phy_g_init_sub(mac);
2327 bwn_reset_core(mac, BWN_TGSLOW_SUPPORT_G);
2333 bwn_phy_g_txctl(struct bwn_mac *mac)
2335 struct bwn_phy *phy = &mac->mac_phy;
2349 bwn_phy_g_init(struct bwn_mac *mac)
2352 bwn_phy_g_init_sub(mac);
2357 bwn_phy_g_exit(struct bwn_mac *mac)
2359 struct bwn_txpwr_loctl *lo = &mac->mac_phy.phy_g.pg_loctl;
2371 bwn_phy_g_read(struct bwn_mac *mac, uint16_t reg)
2374 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
2375 return (BWN_READ_2(mac, BWN_PHYDATA));
2379 bwn_phy_g_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
2382 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
2383 BWN_WRITE_2(mac, BWN_PHYDATA, value);
2387 bwn_phy_g_rf_read(struct bwn_mac *mac, uint16_t reg)
2391 BWN_WRITE_2(mac, BWN_RFCTL, reg | 0x80);
2392 return (BWN_READ_2(mac, BWN_RFDATALO));
2396 bwn_phy_g_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
2400 BWN_WRITE_2(mac, BWN_RFCTL, reg);
2401 BWN_WRITE_2(mac, BWN_RFDATALO, value);
2405 bwn_phy_g_hwpctl(struct bwn_mac *mac)
2408 return (mac->mac_phy.rev >= 6);
2412 bwn_phy_g_rf_onoff(struct bwn_mac *mac, int on)
2414 struct bwn_phy *phy = &mac->mac_phy;
2423 BWN_PHY_WRITE(mac, 0x15, 0x8000);
2424 BWN_PHY_WRITE(mac, 0x15, 0xcc00);
2425 BWN_PHY_WRITE(mac, 0x15, (phy->gmode ? 0xc0 : 0x0));
2427 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER,
2429 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
2434 bwn_phy_g_switch_chan(mac, 6, 1);
2435 bwn_phy_g_switch_chan(mac, channel, 0);
2439 rfover = BWN_PHY_READ(mac, BWN_PHY_RFOVER);
2440 rfoverval = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL);
2444 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, rfover | 0x008c);
2445 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfoverval & 0xff73);
2449 bwn_phy_g_switch_channel(struct bwn_mac *mac, uint32_t newchan)
2454 bwn_phy_g_switch_chan(mac, newchan, 0);
2460 bwn_phy_g_get_default_chan(struct bwn_mac *mac)
2467 bwn_phy_g_set_antenna(struct bwn_mac *mac, int antenna)
2469 struct bwn_phy *phy = &mac->mac_phy;
2477 hf = bwn_hf_read(mac) & ~BWN_HF_UCODE_ANTDIV_HELPER;
2478 bwn_hf_write(mac, hf);
2480 BWN_PHY_WRITE(mac, BWN_PHY_BBANDCFG,
2481 (BWN_PHY_READ(mac, BWN_PHY_BBANDCFG) & ~BWN_PHY_BBANDCFG_RXANT) |
2486 tmp = BWN_PHY_READ(mac, BWN_PHY_ANTDWELL);
2491 BWN_PHY_WRITE(mac, BWN_PHY_ANTDWELL, tmp);
2493 tmp = BWN_PHY_READ(mac, BWN_PHY_ANTWRSETT);
2498 BWN_PHY_WRITE(mac, BWN_PHY_ANTWRSETT, tmp);
2500 BWN_PHY_WRITE(mac, BWN_PHY_OFDM61,
2501 BWN_PHY_READ(mac, BWN_PHY_OFDM61) | BWN_PHY_OFDM61_10);
2502 BWN_PHY_WRITE(mac, BWN_PHY_DIVSRCHGAINBACK,
2503 (BWN_PHY_READ(mac, BWN_PHY_DIVSRCHGAINBACK) & 0xff00) |
2506 BWN_PHY_WRITE(mac, BWN_PHY_ADIVRELATED, 8);
2508 BWN_PHY_WRITE(mac, BWN_PHY_ADIVRELATED,
2509 (BWN_PHY_READ(mac, BWN_PHY_ADIVRELATED) & 0xff00) |
2513 BWN_PHY_WRITE(mac, BWN_PHY_OFDM9B, 0xdc);
2516 bwn_hf_write(mac, hf);
2520 bwn_phy_g_im(struct bwn_mac *mac, int mode)
2522 struct bwn_phy *phy = &mac->mac_phy;
2536 bwn_phy_g_recalc_txpwr(struct bwn_mac *mac, int ignore_tssi)
2538 struct bwn_phy *phy = &mac->mac_phy;
2540 struct bwn_softc *sc = mac->mac_sc;
2549 cck = bwn_phy_shm_tssi_read(mac, BWN_SHARED_TSSI_CCK);
2550 ofdm = bwn_phy_shm_tssi_read(mac, BWN_SHARED_TSSI_OFDM_G);
2588 bwn_phy_g_set_txpwr(struct bwn_mac *mac)
2590 struct bwn_phy *phy = &mac->mac_phy;
2592 struct bwn_softc *sc = mac->mac_sc;
2596 bwn_mac_suspend(mac);
2605 bwn_phy_g_setatt(mac, &bbatt, &rfatt);
2630 bwn_phy_g_setatt(mac, &bbatt, &rfatt);
2636 bwn_phy_lock(mac);
2637 bwn_rf_lock(mac);
2638 bwn_phy_g_set_txpwr_sub(mac, &pg->pg_bbatt, &pg->pg_rfatt,
2640 bwn_rf_unlock(mac);
2641 bwn_phy_unlock(mac);
2643 bwn_mac_enable(mac);
2647 bwn_phy_g_task_15s(struct bwn_mac *mac)
2649 struct bwn_phy *phy = &mac->mac_phy;
2651 struct bwn_softc *sc = mac->mac_sc;
2657 bwn_mac_suspend(mac);
2663 if (bwn_has_hwpctl(mac)) {
2666 bwn_lo_get_powervector(mac);
2667 bwn_phy_g_dc_lookup_init(mac, 0);
2690 cal = bwn_lo_calibset(mac, &pg->pg_bbatt,
2698 bwn_lo_write(mac, &cal->ctl);
2702 bwn_mac_enable(mac);
2706 bwn_phy_g_task_60s(struct bwn_mac *mac)
2708 struct bwn_phy *phy = &mac->mac_phy;
2709 struct bwn_softc *sc = mac->mac_sc;
2715 bwn_mac_suspend(mac);
2716 bwn_nrssi_slope_11g(mac);
2718 bwn_switch_channel(mac, (old >= 8) ? 1 : 13);
2719 bwn_switch_channel(mac, old);
2721 bwn_mac_enable(mac);
2725 bwn_phy_switch_analog(struct bwn_mac *mac, int on)
2728 BWN_WRITE_2(mac, BWN_PHY0, on ? 0 : 0xf4);
2738 struct bwn_mac *mac = sc->sc_curmac;
2741 mac->mac_status < BWN_MAC_STATUS_STARTED) {
2777 struct bwn_mac *mac;
2781 mac = (struct bwn_mac *)sc->sc_curmac;
2782 bwn_set_slot_time(mac,
2799 struct bwn_mac *mac = sc->sc_curmac;
2802 mac = sc->sc_curmac;
2803 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
2808 bwn_set_opmode(mac);
2820 struct bwn_mac *mac = sc->sc_curmac;
2825 mac = sc->sc_curmac;
2826 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
2827 bwn_mac_suspend(mac);
2830 bwn_wme_loadparams(mac, wmep, bwn_wme_shm_offsets[i]);
2832 bwn_mac_enable(mac);
2843 struct bwn_mac *mac;
2846 mac = sc->sc_curmac;
2847 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
2849 bwn_set_opmode(mac);
2851 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_SKIP_CFP_UPDATE);
2861 struct bwn_mac *mac;
2864 mac = sc->sc_curmac;
2865 if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) {
2867 bwn_set_opmode(mac);
2868 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_SKIP_CFP_UPDATE);
2878 struct bwn_mac *mac = sc->sc_curmac;
2879 struct bwn_phy *phy = &mac->mac_phy;
2887 bwn_mac_suspend(mac);
2888 bwn_set_txretry(mac, BWN_RETRY_SHORT, BWN_RETRY_LONG);
2891 bwn_switch_channel(mac, chan);
2897 bwn_phy_txpower_check(mac, BWN_TXPWR_IGNORE_TIME |
2901 bwn_set_txantenna(mac, BWN_ANT_DEFAULT);
2903 phy->set_antenna(mac, BWN_ANT_DEFAULT);
2907 bwn_rf_turnon(mac);
2908 if (!(mac->mac_flags & BWN_MAC_FLAG_RADIO_ON))
2912 bwn_rf_turnoff(mac);
2915 bwn_mac_enable(mac);
2939 uint8_t mac[IEEE80211_ADDR_LEN];
2941 IEEE80211_ADDR_COPY(mac, mac0);
2964 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
2965 IEEE80211_ADDR_COPY(vap->iv_myaddr, mac);
3013 struct bwn_mac *mac;
3026 mac = sc->sc_curmac;
3027 if (mac->mac_status == BWN_MAC_STATUS_UNINIT) {
3028 error = bwn_core_init(mac);
3032 if (mac->mac_status == BWN_MAC_STATUS_INITED)
3033 bwn_core_start(mac);
3035 bwn_set_opmode(mac);
3036 bwn_set_pretbtt(mac);
3037 bwn_spu_setdelay(mac, 0);
3038 bwn_set_macaddr(mac);
3059 struct bwn_mac *mac = sc->sc_curmac;
3064 if (mac->mac_status >= BWN_MAC_STATUS_INITED) {
3066 bwn_set_opmode(mac);
3067 bwn_set_macaddr(mac);
3070 if (mac->mac_status >= BWN_MAC_STATUS_STARTED)
3071 bwn_core_stop(mac);
3076 bwn_core_exit(mac);
3131 bwn_core_init(struct bwn_mac *mac)
3133 struct bwn_softc *sc = mac->mac_sc;
3137 KASSERT(mac->mac_status == BWN_MAC_STATUS_UNINIT,
3142 bwn_reset_core(mac,
3143 mac->mac_phy.gmode ? BWN_TGSLOW_SUPPORT_G : 0);
3145 mac->mac_flags &= ~BWN_MAC_FLAG_DFQVALID;
3146 mac->mac_flags |= BWN_MAC_FLAG_RADIO_ON;
3147 mac->mac_phy.hwpctl = (bwn_hwpctl) ? 1 : 0;
3148 BWN_GETTIME(mac->mac_phy.nexttime);
3149 mac->mac_phy.txerrors = BWN_TXERROR_MAX;
3150 bzero(&mac->mac_stats, sizeof(mac->mac_stats));
3151 mac->mac_stats.link_noise = -95;
3152 mac->mac_reason_intr = 0;
3153 bzero(mac->mac_reason, sizeof(mac->mac_reason));
3154 mac->mac_intr_mask = BWN_INTR_MASKTEMPLATE;
3157 mac->mac_intr_mask &= ~BWN_INTR_PHY_TXERR;
3159 mac->mac_suspended = 1;
3160 mac->mac_task_state = 0;
3161 memset(&mac->mac_noise, 0, sizeof(mac->mac_noise));
3163 mac->mac_phy.init_pre(mac);
3168 bwn_bt_disable(mac);
3169 if (mac->mac_phy.prepare_hw) {
3170 error = mac->mac_phy.prepare_hw(mac);
3174 error = bwn_chip_init(mac);
3177 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_COREREV,
3179 hf = bwn_hf_read(mac);
3180 if (mac->mac_phy.type == BWN_PHYTYPE_G) {
3184 if (mac->mac_phy.rev == 1)
3187 if (mac->mac_phy.rf_ver == 0x2050) {
3188 if (mac->mac_phy.rf_rev < 6)
3190 if (mac->mac_phy.rf_rev == 6)
3199 bwn_hf_write(mac, hf);
3201 bwn_set_txretry(mac, BWN_RETRY_SHORT, BWN_RETRY_LONG);
3202 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_SHORT_RETRY_FALLBACK, 3);
3203 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_LONG_RETRY_FALLBACK, 2);
3204 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_MAXTIME, 1);
3206 bwn_rate_init(mac);
3207 bwn_set_phytxctl(mac);
3209 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_CONT_MIN,
3210 (mac->mac_phy.type == BWN_PHYTYPE_B) ? 0x1f : 0xf);
3211 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_CONT_MAX, 0x3ff);
3214 bwn_pio_init(mac);
3216 bwn_dma_init(mac);
3217 bwn_wme_init(mac);
3218 bwn_spu_setdelay(mac, 1);
3219 bwn_bt_enable(mac);
3223 bwn_set_macaddr(mac);
3224 bwn_crypt_init(mac);
3228 mac->mac_status = BWN_MAC_STATUS_INITED;
3234 KASSERT(mac->mac_status == BWN_MAC_STATUS_UNINIT,
3240 bwn_core_start(struct bwn_mac *mac)
3242 struct bwn_softc *sc = mac->mac_sc;
3245 KASSERT(mac->mac_status == BWN_MAC_STATUS_INITED,
3252 tmp = BWN_READ_4(mac, BWN_XMITSTAT_0);
3255 tmp = BWN_READ_4(mac, BWN_XMITSTAT_1);
3258 bwn_mac_enable(mac);
3259 BWN_WRITE_4(mac, BWN_INTR_MASK, mac->mac_intr_mask);
3260 callout_reset(&sc->sc_task_ch, hz * 15, bwn_tasks, mac);
3262 mac->mac_status = BWN_MAC_STATUS_STARTED;
3266 bwn_core_exit(struct bwn_mac *mac)
3268 struct bwn_softc *sc = mac->mac_sc;
3271 BWN_ASSERT_LOCKED(mac->mac_sc);
3273 KASSERT(mac->mac_status <= BWN_MAC_STATUS_INITED,
3276 if (mac->mac_status != BWN_MAC_STATUS_INITED)
3278 mac->mac_status = BWN_MAC_STATUS_UNINIT;
3280 macctl = BWN_READ_4(mac, BWN_MACCTL);
3283 BWN_WRITE_4(mac, BWN_MACCTL, macctl);
3285 bwn_dma_stop(mac);
3286 bwn_pio_stop(mac);
3287 bwn_chip_exit(mac);
3288 mac->mac_phy.switch_analog(mac, 0);
3294 bwn_bt_disable(struct bwn_mac *mac)
3296 struct bwn_softc *sc = mac->mac_sc;
3303 bwn_chip_init(struct bwn_mac *mac)
3305 struct bwn_softc *sc = mac->mac_sc;
3306 struct bwn_phy *phy = &mac->mac_phy;
3313 BWN_WRITE_4(mac, BWN_MACCTL, macctl);
3315 error = bwn_fw_fillinfo(mac);
3318 error = bwn_fw_loaducode(mac);
3322 error = bwn_gpio_init(mac);
3326 error = bwn_fw_loadinitvals(mac);
3331 phy->switch_analog(mac, 1);
3332 error = bwn_phy_init(mac);
3338 phy->set_im(mac, BWN_IMMODE_NONE);
3340 phy->set_antenna(mac, BWN_ANT_DEFAULT);
3341 bwn_set_txantenna(mac, BWN_ANT_DEFAULT);
3344 BWN_WRITE_2(mac, 0x005e, BWN_READ_2(mac, 0x005e) | 0x0004);
3345 BWN_WRITE_4(mac, 0x0100, 0x01000000);
3347 BWN_WRITE_4(mac, 0x010c, 0x01000000);
3349 BWN_WRITE_4(mac, BWN_MACCTL,
3350 BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_STA);
3351 BWN_WRITE_4(mac, BWN_MACCTL,
3352 BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_STA);
3353 bwn_shm_write_2(mac, BWN_SHARED, 0x0074, 0x0000);
3355 bwn_set_opmode(mac);
3357 BWN_WRITE_2(mac, 0x060e, 0x0000);
3358 BWN_WRITE_2(mac, 0x0610, 0x8000);
3359 BWN_WRITE_2(mac, 0x0604, 0x0000);
3360 BWN_WRITE_2(mac, 0x0606, 0x0200);
3362 BWN_WRITE_4(mac, 0x0188, 0x80000000);
3363 BWN_WRITE_4(mac, 0x018c, 0x02000000);
3365 BWN_WRITE_4(mac, BWN_INTR_REASON, 0x00004000);
3366 BWN_WRITE_4(mac, BWN_DMA0_INTR_MASK, 0x0001dc00);
3367 BWN_WRITE_4(mac, BWN_DMA1_INTR_MASK, 0x0000dc00);
3368 BWN_WRITE_4(mac, BWN_DMA2_INTR_MASK, 0x0000dc00);
3369 BWN_WRITE_4(mac, BWN_DMA3_INTR_MASK, 0x0001dc00);
3370 BWN_WRITE_4(mac, BWN_DMA4_INTR_MASK, 0x0000dc00);
3371 BWN_WRITE_4(mac, BWN_DMA5_INTR_MASK, 0x0000dc00);
3374 BWN_WRITE_2(mac, BWN_POWERUP_DELAY, siba_get_cc_powerdelay(sc->sc_dev));
3380 bwn_hf_read(struct bwn_mac *mac)
3384 ret = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFHI);
3386 ret |= bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFMI);
3388 ret |= bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFLO);
3393 bwn_hf_write(struct bwn_mac *mac, uint64_t value)
3396 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_HFLO,
3398 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_HFMI,
3400 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_HFHI,
3405 bwn_set_txretry(struct bwn_mac *mac, int s, int l)
3408 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_SHORT_RETRY, MIN(s, 0xf));
3409 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_SCRATCH_LONG_RETRY, MIN(l, 0xf));
3413 bwn_rate_init(struct bwn_mac *mac)
3416 switch (mac->mac_phy.type) {
3421 bwn_rate_write(mac, BWN_OFDM_RATE_6MB, 1);
3422 bwn_rate_write(mac, BWN_OFDM_RATE_12MB, 1);
3423 bwn_rate_write(mac, BWN_OFDM_RATE_18MB, 1);
3424 bwn_rate_write(mac, BWN_OFDM_RATE_24MB, 1);
3425 bwn_rate_write(mac, BWN_OFDM_RATE_36MB, 1);
3426 bwn_rate_write(mac, BWN_OFDM_RATE_48MB, 1);
3427 bwn_rate_write(mac, BWN_OFDM_RATE_54MB, 1);
3428 if (mac->mac_phy.type == BWN_PHYTYPE_A)
3432 bwn_rate_write(mac, BWN_CCK_RATE_1MB, 0);
3433 bwn_rate_write(mac, BWN_CCK_RATE_2MB, 0);
3434 bwn_rate_write(mac, BWN_CCK_RATE_5MB, 0);
3435 bwn_rate_write(mac, BWN_CCK_RATE_11MB, 0);
3443 bwn_rate_write(struct bwn_mac *mac, uint16_t rate, int ofdm)
3454 bwn_shm_write_2(mac, BWN_SHARED, offset + 0x20,
3455 bwn_shm_read_2(mac, BWN_SHARED, offset));
3503 bwn_set_phytxctl(struct bwn_mac *mac)
3509 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_BEACON_PHYCTL, ctl);
3510 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_ACKCTS_PHYCTL, ctl);
3511 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_PHYCTL, ctl);
3515 bwn_pio_init(struct bwn_mac *mac)
3517 struct bwn_pio *pio = &mac->mac_method.pio;
3519 BWN_WRITE_4(mac, BWN_MACCTL, BWN_READ_4(mac, BWN_MACCTL)
3521 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_RX_PADOFFSET, 0);
3523 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_BK], 0);
3524 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_BE], 1);
3525 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_VI], 2);
3526 bwn_pio_set_txqueue(mac, &pio->wme[WME_AC_VO], 3);
3527 bwn_pio_set_txqueue(mac, &pio->mcast, 4);
3528 bwn_pio_setupqueue_rx(mac, &pio->rx, 0);
3532 bwn_pio_set_txqueue(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
3536 struct bwn_softc *sc = mac->mac_sc;
3539 tq->tq_base = bwn_pio_idx2base(mac, index) + BWN_PIO_TXQOFFSET(mac);
3546 tq->tq_size = bwn_pio_read_2(mac, tq, BWN_PIO_TXQBUFSIZE);
3560 bwn_pio_idx2base(struct bwn_mac *mac, int index)
3562 struct bwn_softc *sc = mac->mac_sc;
3593 bwn_pio_setupqueue_rx(struct bwn_mac *mac, struct bwn_pio_rxqueue *prq,
3596 struct bwn_softc *sc = mac->mac_sc;
3598 prq->prq_mac = mac;
3600 prq->prq_base = bwn_pio_idx2base(mac, index) + BWN_PIO_RXQOFFSET(mac);
3601 bwn_dma_rxdirectfifo(mac, index, 1);
3620 bwn_pio_read_2(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
3624 return (BWN_READ_2(mac, tq->tq_base + offset));
3628 bwn_dma_rxdirectfifo(struct bwn_mac *mac, int idx, uint8_t enable)
3634 type = bwn_dma_mask2type(bwn_dma_mask(mac));
3637 ctl = BWN_READ_4(mac, base + BWN_DMA64_RXCTL);
3641 BWN_WRITE_4(mac, base + BWN_DMA64_RXCTL, ctl);
3643 ctl = BWN_READ_4(mac, base + BWN_DMA32_RXCTL);
3647 BWN_WRITE_4(mac, base + BWN_DMA32_RXCTL, ctl);
3652 bwn_dma_mask(struct bwn_mac *mac)
3657 tmp = BWN_READ_4(mac, SIBA_TGSHIGH);
3661 BWN_WRITE_4(mac, base + BWN_DMA32_TXCTL, BWN_DMA32_TXADDREXT_MASK);
3662 tmp = BWN_READ_4(mac, base + BWN_DMA32_TXCTL);
3729 bwn_dma_init(struct bwn_mac *mac)
3731 struct bwn_dma *dma = &mac->mac_method.dma;
3744 bwn_dma_ringsetup(struct bwn_mac *mac, int controller_index,
3747 struct bwn_dma *dma = &mac->mac_method.dma;
3751 struct bwn_softc *sc = mac->mac_sc;
3767 dr->dr_mac = mac;
3812 BWN_HDRSIZE(mac), M_DEVBUF, M_NOWAIT | M_ZERO);
3824 BWN_HDRSIZE(mac),
4114 struct bwn_mac *mac = dr->dr_mac;
4115 struct bwn_dma *dma = &mac->mac_method.dma;
4116 struct bwn_softc *sc = mac->mac_sc;
4262 struct bwn_mac *mac = dr->dr_mac;
4263 struct bwn_dma *dma = &mac->mac_method.dma;
4264 struct bwn_softc *sc = mac->mac_sc;
4292 bwn_dma_tx_reset(struct bwn_mac *mac, uint16_t base,
4295 struct bwn_softc *sc = mac->mac_sc;
4303 value = BWN_READ_4(mac, base + offset);
4320 BWN_WRITE_4(mac, base + offset, 0);
4324 value = BWN_READ_4(mac, base + offset);
4350 bwn_dma_rx_reset(struct bwn_mac *mac, uint16_t base,
4353 struct bwn_softc *sc = mac->mac_sc;
4359 BWN_WRITE_4(mac, base + offset, 0);
4363 value = BWN_READ_4(mac, base + offset);
4428 bwn_wme_init(struct bwn_mac *mac)
4431 bwn_wme_load(mac);
4434 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_EDCF);
4435 BWN_WRITE_2(mac, BWN_IFSCTL, BWN_READ_2(mac, BWN_IFSCTL) |
4440 bwn_spu_setdelay(struct bwn_mac *mac, int idle)
4442 struct bwn_softc *sc = mac->mac_sc;
4446 delay = (mac->mac_phy.type == BWN_PHYTYPE_A) ? 3700 : 1050;
4449 if ((mac->mac_phy.rf_ver == 0x2050) && (mac->mac_phy.rf_rev == 8))
4452 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_SPU_WAKEUP, delay);
4456 bwn_bt_enable(struct bwn_mac *mac)
4458 struct bwn_softc *sc = mac->mac_sc;
4465 if (mac->mac_phy.type != BWN_PHYTYPE_B && !mac->mac_phy.gmode)
4468 hf = bwn_hf_read(mac);
4473 bwn_hf_write(mac, hf);
4477 bwn_set_macaddr(struct bwn_mac *mac)
4480 bwn_mac_write_bssid(mac);
4481 bwn_mac_setfilter(mac, BWN_MACFILTER_SELF, mac->mac_sc->sc_macaddr);
4485 bwn_clear_keys(struct bwn_mac *mac)
4489 for (i = 0; i < mac->mac_max_nr_keys; i++) {
4490 KASSERT(i >= 0 && i < mac->mac_max_nr_keys,
4493 bwn_key_dowrite(mac, i, BWN_SEC_ALGO_NONE,
4495 if ((i <= 3) && !BWN_SEC_NEWAPI(mac)) {
4496 bwn_key_dowrite(mac, i + 4, BWN_SEC_ALGO_NONE,
4499 mac->mac_key[i].keyconf = NULL;
4504 bwn_crypt_init(struct bwn_mac *mac)
4506 struct bwn_softc *sc = mac->mac_sc;
4508 mac->mac_max_nr_keys = (siba_get_revid(sc->sc_dev) >= 5) ? 58 : 20;
4509 KASSERT(mac->mac_max_nr_keys <= N(mac->mac_key),
4511 mac->mac_ktp = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_KEY_TABLEP);
4512 mac->mac_ktp *= 2;
4514 BWN_WRITE_2(mac, BWN_RCMTA_COUNT, mac->mac_max_nr_keys - 8);
4515 bwn_clear_keys(mac);
4519 bwn_chip_exit(struct bwn_mac *mac)
4521 struct bwn_softc *sc = mac->mac_sc;
4523 bwn_phy_exit(mac);
4528 bwn_fw_fillinfo(struct bwn_mac *mac)
4532 error = bwn_fw_gets(mac, BWN_FWTYPE_DEFAULT);
4535 error = bwn_fw_gets(mac, BWN_FWTYPE_OPENSOURCE);
4542 bwn_gpio_init(struct bwn_mac *mac)
4544 struct bwn_softc *sc = mac->mac_sc;
4547 BWN_WRITE_4(mac, BWN_MACCTL,
4548 BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_GPOUT_MASK);
4549 BWN_WRITE_2(mac, BWN_GPIO_MASK,
4550 BWN_READ_2(mac, BWN_GPIO_MASK) | 0x000f);
4557 BWN_WRITE_2(mac, BWN_GPIO_MASK,
4558 BWN_READ_2(mac, BWN_GPIO_MASK) | 0x0200);
4574 bwn_fw_loadinitvals(struct bwn_mac *mac)
4580 struct bwn_fw *fw = &mac->mac_fw;
4584 error = bwn_fwinitvals_write(mac, GETFWOFFSET(fw->initvals, hdr_len),
4590 error = bwn_fwinitvals_write(mac,
4600 bwn_phy_init(struct bwn_mac *mac)
4602 struct bwn_softc *sc = mac->mac_sc;
4605 mac->mac_phy.chan = mac->mac_phy.get_default_chan(mac);
4606 mac->mac_phy.rf_onoff(mac, 1);
4607 error = mac->mac_phy.init(mac);
4612 error = bwn_switch_channel(mac,
4613 mac->mac_phy.get_default_chan(mac));
4621 if (mac->mac_phy.exit)
4622 mac->mac_phy.exit(mac);
4624 mac->mac_phy.rf_onoff(mac, 0);
4630 bwn_set_txantenna(struct bwn_mac *mac, int antenna)
4638 tmp = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_ACKCTS_PHYCTL);
4640 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_ACKCTS_PHYCTL, tmp);
4642 tmp = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_PHYCTL);
4644 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PROBE_RESP_PHYCTL, tmp);
4648 bwn_set_opmode(struct bwn_mac *mac)
4650 struct bwn_softc *sc = mac->mac_sc;
4656 ctl = BWN_READ_4(mac, BWN_MACCTL);
4672 BWN_WRITE_4(mac, BWN_MACCTL, ctl);
4682 BWN_WRITE_2(mac, 0x612, cfp_pretbtt);
4686 bwn_dma_gettype(struct bwn_mac *mac)
4691 tmp = BWN_READ_4(mac, SIBA_TGSHIGH);
4695 BWN_WRITE_4(mac, base + BWN_DMA32_TXCTL, BWN_DMA32_TXADDREXT_MASK);
4696 tmp = BWN_READ_4(mac, base + BWN_DMA32_TXCTL);
4713 bwn_phy_g_init_sub(struct bwn_mac *mac)
4715 struct bwn_phy *phy = &mac->mac_phy;
4717 struct bwn_softc *sc = mac->mac_sc;
4721 bwn_phy_init_b5(mac);
4723 bwn_phy_init_b6(mac);
4726 bwn_phy_init_a(mac);
4729 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, 0);
4730 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL, 0);
4733 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0);
4734 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xc0);
4737 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x400);
4738 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xc0);
4741 tmp = BWN_PHY_READ(mac, BWN_PHY_VERSION_OFDM);
4744 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc2), 0x1816);
4745 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc3), 0x8006);
4748 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xcc), 0x00ff,
4753 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x7e), 0x78);
4755 BWN_PHY_SET(mac, BWN_PHY_EXTG(0x01), 0x80);
4756 BWN_PHY_SET(mac, BWN_PHY_OFDM(0x3e), 0x4);
4759 bwn_loopback_calcgain(mac);
4763 pg->pg_initval = bwn_rf_init_bcm2050(mac);
4765 BWN_RF_WRITE(mac, 0x0078, pg->pg_initval);
4767 bwn_lo_g_init(mac);
4769 BWN_RF_WRITE(mac, 0x52,
4770 (BWN_RF_READ(mac, 0x52) & 0xff00)
4774 BWN_RF_SETMASK(mac, 0x52, 0xfff0, pg->pg_loctl.tx_bias);
4777 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x36), 0x0fff,
4781 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8075);
4783 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x807f);
4785 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x101);
4787 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x202);
4789 bwn_lo_g_adjust(mac);
4790 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8078);
4795 BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_CTRL, i);
4796 BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_DATA,
4797 (uint16_t)MIN(MAX(bwn_nrssi_read(mac, i) - 0xffff,
4800 bwn_nrssi_threshold(mac);
4805 bwn_nrssi_slope_11g(mac);
4807 bwn_nrssi_threshold(mac);
4810 BWN_PHY_WRITE(mac, BWN_PHY_EXTG(0x05), 0x3230);
4811 bwn_phy_hwpctl_init(mac);
4814 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0xbfff);
4815 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xc3), 0x7fff);
4820 bwn_has_hwpctl(struct bwn_mac *mac)
4823 if (mac->mac_phy.hwpctl == 0 || mac->mac_phy.use_hwpctl == NULL)
4825 return (mac->mac_phy.use_hwpctl(mac));
4829 bwn_phy_init_b5(struct bwn_mac *mac)
4831 struct bwn_phy *phy = &mac->mac_phy;
4833 struct bwn_softc *sc = mac->mac_sc;
4838 BWN_RF_SET(mac, 0x007a, 0x0050);
4843 BWN_PHY_WRITE(mac, offset, value);
4847 BWN_PHY_SETMASK(mac, 0x0035, 0xf0ff, 0x0700);
4849 BWN_PHY_WRITE(mac, 0x0038, 0x0667);
4853 BWN_RF_SET(mac, 0x007a, 0x0020);
4854 BWN_RF_SET(mac, 0x0051, 0x0004);
4856 BWN_WRITE_2(mac, BWN_PHY_RADIO, 0x0000);
4858 BWN_PHY_SET(mac, 0x0802, 0x0100);
4859 BWN_PHY_SET(mac, 0x042b, 0x2000);
4861 BWN_PHY_WRITE(mac, 0x001c, 0x186a);
4863 BWN_PHY_SETMASK(mac, 0x0013, 0x00ff, 0x1900);
4864 BWN_PHY_SETMASK(mac, 0x0035, 0xffc0, 0x0064);
4865 BWN_PHY_SETMASK(mac, 0x005d, 0xff80, 0x000a);
4868 if (mac->mac_flags & BWN_MAC_FLAG_BADFRAME_PREEMP)
4869 BWN_PHY_SET(mac, BWN_PHY_RADIO_BITFIELD, (1 << 11));
4872 BWN_PHY_WRITE(mac, 0x0026, 0xce00);
4873 BWN_PHY_WRITE(mac, 0x0021, 0x3763);
4874 BWN_PHY_WRITE(mac, 0x0022, 0x1bc3);
4875 BWN_PHY_WRITE(mac, 0x0023, 0x06f9);
4876 BWN_PHY_WRITE(mac, 0x0024, 0x037e);
4878 BWN_PHY_WRITE(mac, 0x0026, 0xcc00);
4879 BWN_PHY_WRITE(mac, 0x0030, 0x00c6);
4880 BWN_WRITE_2(mac, 0x03ec, 0x3f22);
4883 BWN_PHY_WRITE(mac, 0x0020, 0x3e1c);
4885 BWN_PHY_WRITE(mac, 0x0020, 0x301c);
4888 BWN_WRITE_2(mac, 0x03e4, 0x3000);
4891 bwn_phy_g_switch_chan(mac, 7, 0);
4894 BWN_RF_WRITE(mac, 0x0075, 0x0080);
4895 BWN_RF_WRITE(mac, 0x0079, 0x0081);
4898 BWN_RF_WRITE(mac, 0x0050, 0x0020);
4899 BWN_RF_WRITE(mac, 0x0050, 0x0023);
4902 BWN_RF_WRITE(mac, 0x0050, 0x0020);
4903 BWN_RF_WRITE(mac, 0x005a, 0x0070);
4906 BWN_RF_WRITE(mac, 0x005b, 0x007b);
4907 BWN_RF_WRITE(mac, 0x005c, 0x00b0);
4908 BWN_RF_SET(mac, 0x007a, 0x0007);
4910 bwn_phy_g_switch_chan(mac, old_channel, 0);
4911 BWN_PHY_WRITE(mac, 0x0014, 0x0080);
4912 BWN_PHY_WRITE(mac, 0x0032, 0x00ca);
4913 BWN_PHY_WRITE(mac, 0x002a, 0x88a3);
4915 bwn_phy_g_set_txpwr_sub(mac, &pg->pg_bbatt, &pg->pg_rfatt,
4919 BWN_RF_WRITE(mac, 0x005d, 0x000d);
4921 BWN_WRITE_2(mac, 0x03e4, (BWN_READ_2(mac, 0x03e4) & 0xffc0) | 0x0004);
4925 bwn_loopback_calcgain(struct bwn_mac *mac)
4927 struct bwn_phy *phy = &mac->mac_phy;
4929 struct bwn_softc *sc = mac->mac_sc;
4937 backup_phy[0] = BWN_PHY_READ(mac, BWN_PHY_CRS0);
4938 backup_phy[1] = BWN_PHY_READ(mac, BWN_PHY_CCKBBANDCFG);
4939 backup_phy[2] = BWN_PHY_READ(mac, BWN_PHY_RFOVER);
4940 backup_phy[3] = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL);
4942 backup_phy[4] = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVER);
4943 backup_phy[5] = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVERVAL);
4945 backup_phy[6] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x5a));
4946 backup_phy[7] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x59));
4947 backup_phy[8] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x58));
4948 backup_phy[9] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x0a));
4949 backup_phy[10] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x03));
4950 backup_phy[11] = BWN_PHY_READ(mac, BWN_PHY_LO_MASK);
4951 backup_phy[12] = BWN_PHY_READ(mac, BWN_PHY_LO_CTL);
4952 backup_phy[13] = BWN_PHY_READ(mac, BWN_PHY_CCK(0x2b));
4953 backup_phy[14] = BWN_PHY_READ(mac, BWN_PHY_PGACTL);
4954 backup_phy[15] = BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE);
4956 backup_radio[0] = BWN_RF_READ(mac, 0x52);
4957 backup_radio[1] = BWN_RF_READ(mac, 0x43);
4958 backup_radio[2] = BWN_RF_READ(mac, 0x7a);
4960 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x3fff);
4961 BWN_PHY_SET(mac, BWN_PHY_CCKBBANDCFG, 0x8000);
4962 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0002);
4963 BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xfffd);
4964 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0001);
4965 BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xfffe);
4967 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0001);
4968 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffe);
4969 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0002);
4970 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffd);
4972 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x000c);
4973 BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x000c);
4974 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0030);
4975 BWN_PHY_SETMASK(mac, BWN_PHY_RFOVERVAL, 0xffcf, 0x10);
4977 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), 0x0780);
4978 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), 0xc810);
4979 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0x000d);
4981 BWN_PHY_SET(mac, BWN_PHY_CCK(0x0a), 0x2000);
4983 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0004);
4984 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffb);
4986 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x03), 0xff9f, 0x40);
4989 BWN_RF_WRITE(mac, 0x43, 0x000f);
4991 BWN_RF_WRITE(mac, 0x52, 0);
4992 BWN_RF_SETMASK(mac, 0x43, 0xfff0, 0x9);
4994 bwn_phy_g_set_bbatt(mac, 11);
4997 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0xc020);
4999 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8020);
5000 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, 0);
5002 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xffc0, 0x01);
5003 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x2b), 0xc0ff, 0x800);
5005 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0100);
5006 BWN_PHY_MASK(mac, BWN_PHY_RFOVERVAL, 0xcfff);
5010 BWN_PHY_SET(mac, BWN_PHY_RFOVER, 0x0800);
5011 BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x8000);
5014 BWN_RF_MASK(mac, 0x7a, 0x00f7);
5020 BWN_RF_WRITE(mac, 0x43, i);
5021 BWN_PHY_SETMASK(mac, BWN_PHY_RFOVERVAL, 0xf0ff,
5023 BWN_PHY_SETMASK(mac, BWN_PHY_PGACTL, 0x0fff, 0xa000);
5024 BWN_PHY_SET(mac, BWN_PHY_PGACTL, 0xf000);
5026 if (BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE) >= 0xdfc)
5034 BWN_PHY_SET(mac, BWN_PHY_RFOVERVAL, 0x30);
5037 BWN_PHY_SETMASK(mac, BWN_PHY_RFOVERVAL, 0xf0ff, j << 8);
5038 BWN_PHY_SETMASK(mac, BWN_PHY_PGACTL, 0x0fff, 0xa000);
5039 BWN_PHY_SET(mac, BWN_PHY_PGACTL, 0xf000);
5042 if (BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE) >= 0xdfc)
5050 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, backup_phy[4]);
5051 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL, backup_phy[5]);
5053 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), backup_phy[6]);
5054 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), backup_phy[7]);
5055 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), backup_phy[8]);
5056 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x0a), backup_phy[9]);
5057 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x03), backup_phy[10]);
5058 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, backup_phy[11]);
5059 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, backup_phy[12]);
5060 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), backup_phy[13]);
5061 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, backup_phy[14]);
5063 bwn_phy_g_set_bbatt(mac, backup_bband);
5065 BWN_RF_WRITE(mac, 0x52, backup_radio[0]);
5066 BWN_RF_WRITE(mac, 0x43, backup_radio[1]);
5067 BWN_RF_WRITE(mac, 0x7a, backup_radio[2]);
5069 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, backup_phy[2] | 0x0003);
5071 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, backup_phy[2]);
5072 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, backup_phy[3]);
5073 BWN_PHY_WRITE(mac, BWN_PHY_CRS0, backup_phy[0]);
5074 BWN_PHY_WRITE(mac, BWN_PHY_CCKBBANDCFG, backup_phy[1]);
5082 bwn_rf_init_bcm2050(struct bwn_mac *mac)
5084 struct bwn_phy *phy = &mac->mac_phy;
5098 radio0 = BWN_RF_READ(mac, 0x43);
5099 radio1 = BWN_RF_READ(mac, 0x51);
5100 radio2 = BWN_RF_READ(mac, 0x52);
5101 pgactl = BWN_PHY_READ(mac, BWN_PHY_PGACTL);
5102 cck0 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x5a));
5103 cck1 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x59));
5104 cck2 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x58));
5107 cck3 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x30));
5108 reg0 = BWN_READ_2(mac, 0x3ec);
5110 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), 0xff);
5111 BWN_WRITE_2(mac, 0x3ec, 0x3f3f);
5113 rfover = BWN_PHY_READ(mac, BWN_PHY_RFOVER);
5114 rfoverval = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL);
5115 analogover = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVER);
5116 analogoverval = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVERVAL);
5117 crs0 = BWN_PHY_READ(mac, BWN_PHY_CRS0);
5118 classctl = BWN_PHY_READ(mac, BWN_PHY_CLASSCTL);
5120 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0003);
5121 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffc);
5122 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x7fff);
5123 BWN_PHY_MASK(mac, BWN_PHY_CLASSCTL, 0xfffc);
5125 lomask = BWN_PHY_READ(mac, BWN_PHY_LO_MASK);
5126 loctl = BWN_PHY_READ(mac, BWN_PHY_LO_CTL);
5128 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0xc020);
5130 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8020);
5131 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, 0);
5134 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5135 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVERVAL,
5137 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER,
5138 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVER, 0));
5140 BWN_WRITE_2(mac, 0x3e2, BWN_READ_2(mac, 0x3e2) | 0x8000);
5142 syncctl = BWN_PHY_READ(mac, BWN_PHY_SYNCCTL);
5143 BWN_PHY_MASK(mac, BWN_PHY_SYNCCTL, 0xff7f);
5144 reg1 = BWN_READ_2(mac, 0x3e6);
5145 reg2 = BWN_READ_2(mac, 0x3f4);
5148 BWN_WRITE_2(mac, 0x03e6, 0x0122);
5151 BWN_PHY_SETMASK(mac, BWN_PHY_CCK(0x03), 0xffbf, 0x40);
5152 BWN_WRITE_2(mac, BWN_CHANNEL_EXT,
5153 (BWN_READ_2(mac, BWN_CHANNEL_EXT) | 0x2000));
5156 reg = BWN_RF_READ(mac, 0x60);
5161 BWN_RF_WRITE(mac, 0x78, 0x26);
5163 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5164 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVERVAL,
5167 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xbfaf);
5168 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), 0x1403);
5170 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5171 bwn_rf_2050_rfoverval(mac, BWN_PHY_RFOVERVAL,
5174 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xbfa0);
5175 BWN_RF_SET(mac, 0x51, 0x0004);
5177 BWN_RF_WRITE(mac, 0x43, 0x1f);
5179 BWN_RF_WRITE(mac, 0x52, 0);
5180 BWN_RF_SETMASK(mac, 0x43, 0xfff0, 0x0009);
5182 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0);
5185 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), 0x0480);
5186 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), 0xc810);
5187 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0x000d);
5189 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5190 bwn_rf_2050_rfoverval(mac,
5193 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0);
5196 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5197 bwn_rf_2050_rfoverval(mac,
5200 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xefb0);
5203 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5204 bwn_rf_2050_rfoverval(mac,
5207 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xfff0);
5209 tmp1 += BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE);
5210 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0);
5212 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5213 bwn_rf_2050_rfoverval(mac,
5216 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0);
5220 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0);
5226 BWN_RF_WRITE(mac, 0x78, radio78);
5229 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), 0x0d80);
5230 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), 0xc810);
5231 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0x000d);
5233 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5234 bwn_rf_2050_rfoverval(mac,
5237 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0);
5240 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5241 bwn_rf_2050_rfoverval(mac,
5244 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xefb0);
5247 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5248 bwn_rf_2050_rfoverval(mac,
5251 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xfff0);
5253 tmp2 += BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE);
5254 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), 0);
5256 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL,
5257 bwn_rf_2050_rfoverval(mac,
5260 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xafb0);
5268 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pgactl);
5269 BWN_RF_WRITE(mac, 0x51, radio1);
5270 BWN_RF_WRITE(mac, 0x52, radio2);
5271 BWN_RF_WRITE(mac, 0x43, radio0);
5272 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x5a), cck0);
5273 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x59), cck1);
5274 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x58), cck2);
5275 BWN_WRITE_2(mac, 0x3e6, reg1);
5277 BWN_WRITE_2(mac, 0x3f4, reg2);
5278 BWN_PHY_WRITE(mac, BWN_PHY_SYNCCTL, syncctl);
5279 bwn_spu_workaround(mac, phy->chan);
5281 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), cck3);
5282 BWN_WRITE_2(mac, 0x3ec, reg0);
5284 BWN_WRITE_2(mac, BWN_PHY_RADIO,
5285 BWN_READ_2(mac, BWN_PHY_RADIO)
5287 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, rfover);
5288 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfoverval);
5289 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, analogover);
5290 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL,
5292 BWN_PHY_WRITE(mac, BWN_PHY_CRS0, crs0);
5293 BWN_PHY_WRITE(mac, BWN_PHY_CLASSCTL, classctl);
5295 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, lomask);
5296 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, loctl);
5304 bwn_phy_init_b6(struct bwn_mac *mac)
5306 struct bwn_phy *phy = &mac->mac_phy;
5308 struct bwn_softc *sc = mac->mac_sc;
5315 BWN_PHY_WRITE(mac, 0x003e, 0x817a);
5316 BWN_RF_WRITE(mac, 0x007a, BWN_RF_READ(mac, 0x007a) | 0x0058);
5318 BWN_RF_WRITE(mac, 0x51, 0x37);
5319 BWN_RF_WRITE(mac, 0x52, 0x70);
5320 BWN_RF_WRITE(mac, 0x53, 0xb3);
5321 BWN_RF_WRITE(mac, 0x54, 0x9b);
5322 BWN_RF_WRITE(mac, 0x5a, 0x88);
5323 BWN_RF_WRITE(mac, 0x5b, 0x88);
5324 BWN_RF_WRITE(mac, 0x5d, 0x88);
5325 BWN_RF_WRITE(mac, 0x5e, 0x88);
5326 BWN_RF_WRITE(mac, 0x7d, 0x88);
5327 bwn_hf_write(mac,
5328 bwn_hf_read(mac) | BWN_HF_TSSI_RESET_PSM_WORKAROUN);
5331 BWN_RF_WRITE(mac, 0x51, 0);
5332 BWN_RF_WRITE(mac, 0x52, 0x40);
5333 BWN_RF_WRITE(mac, 0x53, 0xb7);
5334 BWN_RF_WRITE(mac, 0x54, 0x98);
5335 BWN_RF_WRITE(mac, 0x5a, 0x88);
5336 BWN_RF_WRITE(mac, 0x5b, 0x6b);
5337 BWN_RF_WRITE(mac, 0x5c, 0x0f);
5339 BWN_RF_WRITE(mac, 0x5d, 0xfa);
5340 BWN_RF_WRITE(mac, 0x5e, 0xd8);
5342 BWN_RF_WRITE(mac, 0x5d, 0xf5);
5343 BWN_RF_WRITE(mac, 0x5e, 0xb8);
5345 BWN_RF_WRITE(mac, 0x0073, 0x0003);
5346 BWN_RF_WRITE(mac, 0x007d, 0x00a8);
5347 BWN_RF_WRITE(mac, 0x007c, 0x0001);
5348 BWN_RF_WRITE(mac, 0x007e, 0x0008);
5351 BWN_PHY_WRITE(mac, offset, val);
5355 BWN_PHY_WRITE(mac, offset, val);
5359 BWN_PHY_WRITE(mac, offset, (val & 0x3f3f));
5363 BWN_RF_SET(mac, 0x007a, 0x0020);
5364 BWN_RF_SET(mac, 0x0051, 0x0004);
5365 BWN_PHY_SET(mac, 0x0802, 0x0100);
5366 BWN_PHY_SET(mac, 0x042b, 0x2000);
5367 BWN_PHY_WRITE(mac, 0x5b, 0);
5368 BWN_PHY_WRITE(mac, 0x5c, 0);
5372 bwn_phy_g_switch_chan(mac, (old_channel >= 8) ? 1 : 13, 0);
5374 BWN_RF_WRITE(mac, 0x0050, 0x0020);
5375 BWN_RF_WRITE(mac, 0x0050, 0x0023);
5378 BWN_RF_WRITE(mac, 0x7c, BWN_RF_READ(mac, 0x7c) | 0x0002);
5379 BWN_RF_WRITE(mac, 0x50, 0x20);
5382 BWN_RF_WRITE(mac, 0x7c, 0x20);
5383 BWN_RF_WRITE(mac, 0x5a, 0x70);
5384 BWN_RF_WRITE(mac, 0x5b, 0x7b);
5385 BWN_RF_WRITE(mac, 0x5c, 0xb0);
5387 BWN_RF_SETMASK(mac, 0x007a, 0x00f8, 0x0007);
5389 bwn_phy_g_switch_chan(mac, old_channel, 0);
5391 BWN_PHY_WRITE(mac, 0x0014, 0x0200);
5393 BWN_PHY_WRITE(mac, 0x2a, 0x88c2);
5395 BWN_PHY_WRITE(mac, 0x2a, 0x8ac0);
5396 BWN_PHY_WRITE(mac, 0x0038, 0x0668);
5397 bwn_phy_g_set_txpwr_sub(mac, &pg->pg_bbatt, &pg->pg_rfatt,
5400 BWN_PHY_SETMASK(mac, 0x5d, 0xff80, 0x0003);
5402 BWN_RF_WRITE(mac, 0x005d, 0x000d);
5405 BWN_WRITE_2(mac, 0x3e4, 9);
5406 BWN_PHY_MASK(mac, 0x61, 0x0fff);
5408 BWN_PHY_SETMASK(mac, 0x0002, 0xffc0, 0x0004);
5412 BWN_WRITE_2(mac, 0x03e6, 0x0);
5416 bwn_phy_init_a(struct bwn_mac *mac)
5418 struct bwn_phy *phy = &mac->mac_phy;
5419 struct bwn_softc *sc = mac->mac_sc;
5426 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x1b), ~0x1000);
5427 if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) & BWN_PHY_ENCORE_EN)
5428 BWN_PHY_SET(mac, BWN_PHY_ENCORE, 0x0010);
5430 BWN_PHY_MASK(mac, BWN_PHY_ENCORE, ~0x1010);
5433 bwn_wa_init(mac);
5437 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x6e), 0xe000, 0x3cf);
5441 bwn_wa_write_noisescale(struct bwn_mac *mac, const uint16_t *nst)
5446 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_NOISESCALE, i, nst[i]);
5450 bwn_wa_agc(struct bwn_mac *mac)
5452 struct bwn_phy *phy = &mac->mac_phy;
5455 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 0, 254);
5456 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 1, 13);
5457 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 2, 19);
5458 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1_R1, 3, 25);
5459 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 0, 0x2710);
5460 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 1, 0x9b83);
5461 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 2, 0x9b83);
5462 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, 3, 0x0f8d);
5463 BWN_PHY_WRITE(mac, BWN_PHY_LMS, 4);
5465 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 0, 254);
5466 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 1, 13);
5467 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 2, 19);
5468 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC1, 3, 25);
5471 BWN_PHY_SETMASK(mac, BWN_PHY_CCKSHIFTBITS_WA, (uint16_t)~0xff00,
5473 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x1a), ~0x007f, 0x000f);
5474 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x1a), ~0x3f80, 0x2b80);
5475 BWN_PHY_SETMASK(mac, BWN_PHY_ANTWRSETT, 0xf0ff, 0x0300);
5476 BWN_RF_SET(mac, 0x7a, 0x0008);
5477 BWN_PHY_SETMASK(mac, BWN_PHY_N1P1GAIN, ~0x000f, 0x0008);
5478 BWN_PHY_SETMASK(mac, BWN_PHY_P1P2GAIN, ~0x0f00, 0x0600);
5479 BWN_PHY_SETMASK(mac, BWN_PHY_N1N2GAIN, ~0x0f00, 0x0700);
5480 BWN_PHY_SETMASK(mac, BWN_PHY_N1P1GAIN, ~0x0f00, 0x0100);
5482 BWN_PHY_SETMASK(mac, BWN_PHY_N1N2GAIN, ~0x000f, 0x0007);
5483 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x88), ~0x00ff, 0x001c);
5484 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x88), ~0x3f00, 0x0200);
5485 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x96), ~0x00ff, 0x001c);
5486 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x89), ~0x00ff, 0x0020);
5487 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x89), ~0x3f00, 0x0200);
5488 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x82), ~0x00ff, 0x002e);
5489 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x96), (uint16_t)~0xff00, 0x1a00);
5490 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x81), ~0x00ff, 0x0028);
5491 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x81), (uint16_t)~0xff00, 0x2c00);
5493 BWN_PHY_WRITE(mac, BWN_PHY_PEAK_COUNT, 0x092b);
5494 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x1b), ~0x001e, 0x0002);
5496 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x1b), ~0x001e);
5497 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x1f), 0x287a);
5498 BWN_PHY_SETMASK(mac, BWN_PHY_LPFGAINCTL, ~0x000f, 0x0004);
5500 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x22), 0x287a);
5501 BWN_PHY_SETMASK(mac, BWN_PHY_LPFGAINCTL,
5505 BWN_PHY_SETMASK(mac, BWN_PHY_DIVSRCHIDX, 0x8080, 0x7874);
5506 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x8e), 0x1c00);
5508 BWN_PHY_SETMASK(mac, BWN_PHY_DIVP1P2GAIN, ~0x0f00, 0x0600);
5509 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x8b), 0x005e);
5510 BWN_PHY_SETMASK(mac, BWN_PHY_ANTWRSETT, ~0x00ff, 0x001e);
5511 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x8d), 0x0002);
5512 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 0, 0);
5513 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 1, 7);
5514 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 2, 16);
5515 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3_R1, 3, 28);
5517 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 0, 0);
5518 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 1, 7);
5519 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 2, 16);
5520 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC3, 3, 28);
5523 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x26), ~0x0003);
5524 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0x26), ~0x1000);
5526 BWN_PHY_READ(mac, BWN_PHY_VERSION_OFDM);
5530 bwn_wa_grev1(struct bwn_mac *mac)
5532 struct bwn_phy *phy = &mac->mac_phy;
5542 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1_R1, 0x4f19);
5544 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x1861);
5545 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0271);
5546 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800);
5548 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x0098);
5549 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0070);
5550 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc9), 0x0080);
5551 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800);
5553 BWN_PHY_SETMASK(mac, BWN_PHY_CRS0, ~0x03c0, 0xd000);
5554 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0x2c), 0x005a);
5555 BWN_PHY_WRITE(mac, BWN_PHY_CCKSHIFTBITS, 0x0026);
5559 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DACRFPABB, i,
5565 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i,
5569 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i,
5574 bwn_ofdmtab_write_4(mac, BWN_OFDMTAB_ROTOR, i,
5579 if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) &
5581 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g3);
5583 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g2);
5585 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g1);
5588 bwn_ofdmtab_write_4(mac, BWN_OFDMTAB_ADVRETARD, i,
5593 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI_R1,
5597 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI, i, 0x0820);
5600 bwn_wa_agc(mac);
5604 bwn_wa_grev26789(struct bwn_mac *mac)
5606 struct bwn_phy *phy = &mac->mac_phy;
5613 bwn_gtab_write(mac, BWN_GTAB_ORIGTR, 0, 0xc480);
5617 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1_R1, 0x4f19);
5619 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x1861);
5620 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0271);
5621 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800);
5623 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES1, 0x0098);
5624 BWN_PHY_WRITE(mac, BWN_PHY_CRSTHRES2, 0x0070);
5625 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xc9), 0x0080);
5626 BWN_PHY_SET(mac, BWN_PHY_ANTDWELL, 0x0800);
5630 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_RSSI, i, i);
5635 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i,
5639 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_AGC2, i,
5644 if (BWN_PHY_READ(mac, BWN_PHY_ENCORE) &
5646 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g3);
5648 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g2);
5650 bwn_wa_write_noisescale(mac, bwn_tab_noisescale_g1);
5653 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_MINSIGSQ, i,
5658 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI_R1, i,
5662 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_WRSSI, i, 0x0820);
5665 bwn_wa_agc(mac);
5667 ofdmrev = BWN_PHY_READ(mac, BWN_PHY_VERSION_OFDM) & BWN_PHYVER_VERSION;
5670 BWN_PHY_WRITE(mac, BWN_PHY_PWRDOWN, 0x1808);
5672 BWN_PHY_WRITE(mac, BWN_PHY_PWRDOWN, 0x1000);
5674 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DAC, 3, 0x1044);
5675 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DAC, 4, 0x7201);
5676 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_DAC, 6, 0x0040);
5679 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_0F, 2, 15);
5680 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_0F, 3, 20);
5684 bwn_wa_init(struct bwn_mac *mac)
5686 struct bwn_phy *phy = &mac->mac_phy;
5687 struct bwn_softc *sc = mac->mac_sc;
5693 bwn_wa_grev1(mac);
5700 bwn_wa_grev26789(mac);
5710 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 1,
5712 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX_R1, 2,
5715 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 1, 0x0002);
5716 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX, 2, 0x0001);
5720 BWN_PHY_MASK(mac, BWN_PHY_EXTG(0x11), 0xf7ff);
5721 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX,
5723 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX,
5725 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX,
5727 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX,
5729 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX,
5731 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_GAINX,
5737 BWN_PHY_WRITE(mac, BWN_PHY_GTABCTL, 0x3120);
5738 BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, 0xc480);
5741 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 0, 0);
5742 bwn_ofdmtab_write_2(mac, BWN_OFDMTAB_UNKNOWN_11, 1, 0);
5746 bwn_ofdmtab_write_2(struct bwn_mac *mac, uint16_t table, uint16_t offset,
5749 struct bwn_phy_g *pg = &mac->mac_phy.phy_g;
5755 BWN_PHY_WRITE(mac, BWN_PHY_OTABLECTL, addr);
5759 BWN_PHY_WRITE(mac, BWN_PHY_OTABLEI, value);
5763 bwn_ofdmtab_write_4(struct bwn_mac *mac, uint16_t table, uint16_t offset,
5766 struct bwn_phy_g *pg = &mac->mac_phy.phy_g;
5772 BWN_PHY_WRITE(mac, BWN_PHY_OTABLECTL, addr);
5777 BWN_PHY_WRITE(mac, BWN_PHY_OTABLEI, value);
5778 BWN_PHY_WRITE(mac, BWN_PHY_OTABLEQ, (value >> 16));
5782 bwn_gtab_write(struct bwn_mac *mac, uint16_t table, uint16_t offset,
5786 BWN_PHY_WRITE(mac, BWN_PHY_GTABCTL, table + offset);
5787 BWN_PHY_WRITE(mac, BWN_PHY_GTABDATA, value);
5791 bwn_dummy_transmission(struct bwn_mac *mac, int ofdm, int paon)
5793 struct bwn_phy *phy = &mac->mac_phy;
5794 struct bwn_softc *sc = mac->mac_sc;
5809 BWN_ASSERT_LOCKED(mac->mac_sc);
5812 bwn_ram_write(mac, i * 4, buffer[i]);
5814 BWN_WRITE_2(mac, 0x0568, 0x0000);
5815 BWN_WRITE_2(mac, 0x07c0,
5818 BWN_WRITE_2(mac, 0x050c, value);
5820 BWN_WRITE_2(mac, 0x0514, 0x1a02);
5821 BWN_WRITE_2(mac, 0x0508, 0x0000);
5822 BWN_WRITE_2(mac, 0x050a, 0x0000);
5823 BWN_WRITE_2(mac, 0x054c, 0x0000);
5824 BWN_WRITE_2(mac, 0x056a, 0x0014);
5825 BWN_WRITE_2(mac, 0x0568, 0x0826);
5826 BWN_WRITE_2(mac, 0x0500, 0x0000);
5828 BWN_WRITE_2(mac, 0x0502, 0x0050);
5830 BWN_WRITE_2(mac, 0x0502, 0x0030);
5833 BWN_RF_WRITE(mac, 0x0051, 0x0017);
5835 value = BWN_READ_2(mac, 0x050e);
5841 value = BWN_READ_2(mac, 0x050e);
5847 value = BWN_READ_2(mac, 0x0690);
5853 BWN_RF_WRITE(mac, 0x0051, 0x0037);
5857 bwn_ram_write(struct bwn_mac *mac, uint16_t offset, uint32_t val)
5863 macctl = BWN_READ_4(mac, BWN_MACCTL);
5867 BWN_WRITE_4(mac, BWN_RAM_CONTROL, offset);
5868 BWN_BARRIER(mac, BUS_SPACE_BARRIER_WRITE);
5869 BWN_WRITE_4(mac, BWN_RAM_DATA, val);
5873 bwn_lo_write(struct bwn_mac *mac, struct bwn_loctl *ctl)
5877 KASSERT(mac->mac_phy.type == BWN_PHYTYPE_G,
5882 BWN_PHY_WRITE(mac, BWN_PHY_LO_CTL, value);
5886 bwn_lo_calcfeed(struct bwn_mac *mac,
5889 struct bwn_phy *phy = &mac->mac_phy;
5890 struct bwn_softc *sc = mac->mac_sc;
5910 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xe300);
5911 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover);
5914 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover);
5917 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, rfover);
5919 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xf300);
5922 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pga);
5925 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pga);
5928 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, pga);
5931 feedthrough = BWN_PHY_READ(mac, BWN_PHY_LO_LEAKAGE);
5937 bwn_lo_txctl_regtable(struct bwn_mac *mac,
5940 struct bwn_phy *phy = &mac->mac_phy;
5972 bwn_lo_measure_txctl_values(struct bwn_mac *mac)
5974 struct bwn_phy *phy = &mac->mac_phy;
6026 BWN_RF_SETMASK(mac, 0x43, 0xfff0, rf_pctl_reg);
6027 bwn_phy_g_set_bbatt(mac, 2);
6029 reg = bwn_lo_txctl_regtable(mac, &mask, NULL);
6031 BWN_RF_MASK(mac, reg, mask);
6041 BWN_RF_SETMASK(mac, 0x52, 0xff0f, tx_magn);
6044 BWN_RF_SETMASK(mac, 0x52, 0xfff0, tx_bias);
6045 feedthrough = bwn_lo_calcfeed(mac, 0, pga,
6055 BWN_RF_WRITE(mac, 0x52,
6056 (BWN_RF_READ(mac, 0x52)
6063 BWN_RF_MASK(mac, 0x52, 0xfff0);
6070 bwn_lo_get_powervector(struct bwn_mac *mac)
6072 struct bwn_phy *phy = &mac->mac_phy;
6080 tmp = bwn_shm_read_2(mac, BWN_SHARED, 0x310 + i);
6082 bwn_shm_write_2(mac, BWN_SHARED, 0x310 + i, 0);
6091 bwn_lo_measure_gain_values(struct bwn_mac *mac, int16_t max_rx_gain,
6094 struct bwn_phy *phy = &mac->mac_phy;
6144 tmp = BWN_RF_READ(mac, 0x7a);
6149 BWN_RF_WRITE(mac, 0x7a, tmp);
6153 bwn_lo_save(struct bwn_mac *mac, struct bwn_lo_g_value *sav)
6155 struct bwn_phy *phy = &mac->mac_phy;
6157 struct bwn_softc *sc = mac->mac_sc;
6162 if (bwn_has_hwpctl(mac)) {
6163 sav->phy_lomask = BWN_PHY_READ(mac, BWN_PHY_LO_MASK);
6164 sav->phy_extg = BWN_PHY_READ(mac, BWN_PHY_EXTG(0x01));
6165 sav->phy_dacctl_hwpctl = BWN_PHY_READ(mac, BWN_PHY_DACCTL);
6166 sav->phy_cck4 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x14));
6167 sav->phy_hpwr_tssictl = BWN_PHY_READ(mac, BWN_PHY_HPWR_TSSICTL);
6169 BWN_PHY_SET(mac, BWN_PHY_HPWR_TSSICTL, 0x100);
6170 BWN_PHY_SET(mac, BWN_PHY_EXTG(0x01), 0x40);
6171 BWN_PHY_SET(mac, BWN_PHY_DACCTL, 0x40);
6172 BWN_PHY_SET(mac, BWN_PHY_CCK(0x14), 0x200);
6176 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x16), 0x410);
6177 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x17), 0x820);
6180 sav->phy_analogover = BWN_PHY_READ(mac, BWN_PHY_ANALOGOVER);
6182 BWN_PHY_READ(mac, BWN_PHY_ANALOGOVERVAL);
6183 sav->phy_rfover = BWN_PHY_READ(mac, BWN_PHY_RFOVER);
6184 sav->phy_rfoverval = BWN_PHY_READ(mac, BWN_PHY_RFOVERVAL);
6185 sav->phy_classctl = BWN_PHY_READ(mac, BWN_PHY_CLASSCTL);
6186 sav->phy_cck3 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x3e));
6187 sav->phy_crs0 = BWN_PHY_READ(mac, BWN_PHY_CRS0);
6189 BWN_PHY_MASK(mac, BWN_PHY_CLASSCTL, 0xfffc);
6190 BWN_PHY_MASK(mac, BWN_PHY_CRS0, 0x7fff);
6191 BWN_PHY_SET(mac, BWN_PHY_ANALOGOVER, 0x0003);
6192 BWN_PHY_MASK(mac, BWN_PHY_ANALOGOVERVAL, 0xfffc);
6197 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x933);
6199 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0x133);
6202 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, 0);
6204 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x3e), 0);
6206 sav->reg0 = BWN_READ_2(mac, 0x3f4);
6207 sav->reg1 = BWN_READ_2(mac, 0x3e2);
6208 sav->rf0 = BWN_RF_READ(mac, 0x43);
6209 sav->rf1 = BWN_RF_READ(mac, 0x7a);
6210 sav->phy_pgactl = BWN_PHY_READ(mac, BWN_PHY_PGACTL);
6211 sav->phy_cck2 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x2a));
6212 sav->phy_syncctl = BWN_PHY_READ(mac, BWN_PHY_SYNCCTL);
6213 sav->phy_dacctl = BWN_PHY_READ(mac, BWN_PHY_DACCTL);
6216 sav->rf2 = BWN_RF_READ(mac, 0x52);
6220 sav->phy_cck0 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x30));
6221 sav->phy_cck1 = BWN_PHY_READ(mac, BWN_PHY_CCK(0x06));
6222 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), 0x00ff);
6223 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x06), 0x3f3f);
6225 BWN_WRITE_2(mac, 0x3e2, BWN_READ_2(mac, 0x3e2)
6228 BWN_WRITE_2(mac, 0x3f4, BWN_READ_2(mac, 0x3f4)
6233 BWN_PHY_WRITE(mac, tmp, 0x007f);
6236 BWN_PHY_WRITE(mac, BWN_PHY_SYNCCTL, tmp & 0xff7f);
6238 BWN_RF_WRITE(mac, 0x007a, tmp & 0xfff0);
6240 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2a), 0x8a3);
6244 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), 0x1003);
6246 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2b), 0x0802);
6248 bwn_dummy_transmission(mac, 0, 1);
6249 bwn_phy_g_switch_chan(mac, 6, 0);
6250 BWN_RF_READ(mac, 0x51);
6252 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0);
6257 bwn_lo_measure_txctl_values(mac);
6260 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0xc078);
6263 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8078);
6265 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, 0x8078);
6270 bwn_lo_restore(struct bwn_mac *mac, struct bwn_lo_g_value *sav)
6272 struct bwn_phy *phy = &mac->mac_phy;
6277 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, 0xe300);
6279 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, tmp | 0xa0);
6281 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, tmp | 0xa2);
6283 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, tmp | 0xa3);
6286 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, tmp);
6290 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0xc078);
6292 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2e), 0x8078);
6294 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x0202);
6296 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2f), 0x0101);
6298 BWN_WRITE_2(mac, 0x3f4, sav->reg0);
6299 BWN_PHY_WRITE(mac, BWN_PHY_PGACTL, sav->phy_pgactl);
6300 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x2a), sav->phy_cck2);
6301 BWN_PHY_WRITE(mac, BWN_PHY_SYNCCTL, sav->phy_syncctl);
6302 BWN_PHY_WRITE(mac, BWN_PHY_DACCTL, sav->phy_dacctl);
6303 BWN_RF_WRITE(mac, 0x43, sav->rf0);
6304 BWN_RF_WRITE(mac, 0x7a, sav->rf1);
6307 BWN_RF_SETMASK(mac, 0x52, 0xff0f, tmp);
6309 BWN_WRITE_2(mac, 0x3e2, sav->reg1);
6312 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x30), sav->phy_cck0);
6313 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x06), sav->phy_cck1);
6316 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVER, sav->phy_analogover);
6317 BWN_PHY_WRITE(mac, BWN_PHY_ANALOGOVERVAL,
6319 BWN_PHY_WRITE(mac, BWN_PHY_CLASSCTL, sav->phy_classctl);
6320 BWN_PHY_WRITE(mac, BWN_PHY_RFOVER, sav->phy_rfover);
6321 BWN_PHY_WRITE(mac, BWN_PHY_RFOVERVAL, sav->phy_rfoverval);
6322 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x3e), sav->phy_cck3);
6323 BWN_PHY_WRITE(mac, BWN_PHY_CRS0, sav->phy_crs0);
6325 if (bwn_has_hwpctl(mac)) {
6327 BWN_PHY_WRITE(mac, BWN_PHY_LO_MASK, tmp);
6328 BWN_PHY_WRITE(mac, BWN_PHY_EXTG(0x01), sav->phy_extg);
6329 BWN_PHY_WRITE(mac, BWN_PHY_DACCTL, sav->phy_dacctl_hwpctl);
6330 BWN_PHY_WRITE(mac, BWN_PHY_CCK(0x14), sav->phy_cck4);
6331 BWN_PHY_WRITE(mac, BWN_PHY_HPWR_TSSICTL, sav->phy_hpwr_tssictl);
6333 bwn_phy_g_switch_chan(mac, sav->old_channel, 1);
6337 bwn_lo_probe_loctl(struct bwn_mac *mac,
6340 struct bwn_phy *phy = &mac->mac_phy;
6376 bwn_lo_write(mac, &test);
6377 feedth = bwn_lo_calcfeed(mac, pg->pg_lna_gain,
6402 bwn_lo_probe_sm(struct bwn_mac *mac, struct bwn_loctl *loctl, int *rxgain)
6404 struct bwn_phy *phy = &mac->mac_phy;
6420 bwn_lo_write(mac, &d.loctl);
6421 feedth = bwn_lo_calcfeed(mac, pg->pg_lna_gain,
6428 feedth = bwn_lo_calcfeed(mac, pg->pg_lna_gain,
6438 lower = bwn_lo_probe_loctl(mac, &probe, &d);
6462 bwn_lo_measure_gain_values(mac, *rxgain, BWN_HAS_LOOPBACK(phy));
6467 bwn_lo_calibset(struct bwn_mac *mac,
6470 struct bwn_phy *phy = &mac->mac_phy;
6479 bwn_mac_suspend(mac);
6480 bwn_lo_save(mac, &sval);
6482 reg = bwn_lo_txctl_regtable(mac, &value, &pad);
6483 BWN_RF_SETMASK(mac, 0x43, 0xfff0, rfatt->att);
6484 BWN_RF_SETMASK(mac, reg, ~value, (rfatt->padmix ? value :0));
6491 bwn_lo_measure_gain_values(mac, rxgain, BWN_HAS_LOOPBACK(phy));
6492 bwn_phy_g_set_bbatt(mac, bbatt->att);
6493 bwn_lo_probe_sm(mac, &loctl, &rxgain);
6495 bwn_lo_restore(mac, &sval);
6496 bwn_mac_enable(mac);
6500 device_printf(mac->mac_sc->sc_dev, "out of memory\n");
6513 bwn_lo_get_calib(struct bwn_mac *mac, const struct bwn_bbatt *bbatt,
6516 struct bwn_txpwr_loctl *lo = &mac->mac_phy.phy_g.pg_loctl;
6527 c = bwn_lo_calibset(mac, bbatt, rfatt);
6536 bwn_phy_g_dc_lookup_init(struct bwn_mac *mac, uint8_t update)
6538 struct bwn_phy *phy = &mac->mac_phy;
6540 struct bwn_softc *sc = mac->mac_sc;
6557 bwn_mac_suspend(mac);
6571 cal = bwn_lo_calibset(mac, bbatt, rfatt);
6592 BWN_PHY_WRITE(mac, 0x3a0 + i, lo->dc_lt[i]);
6594 bwn_mac_enable(mac);
6608 bwn_lo_g_adjust(struct bwn_mac *mac)
6610 struct bwn_phy_g *pg = &mac->mac_phy.phy_g;
6617 cal = bwn_lo_get_calib(mac, &pg->pg_bbatt, &rf);
6620 bwn_lo_write(mac, &cal->ctl);
6624 bwn_lo_g_init(struct bwn_mac *mac)
6627 if (!bwn_has_hwpctl(mac))
6630 bwn_lo_get_powervector(mac);
6631 bwn_phy_g_dc_lookup_init(mac, 1);
6635 bwn_mac_suspend(struct bwn_mac *mac)
6637 struct bwn_softc *sc = mac->mac_sc;
6641 KASSERT(mac->mac_suspended >= 0,
6644 if (mac->mac_suspended == 0) {
6645 bwn_psctl(mac, BWN_PS_AWAKE);
6646 BWN_WRITE_4(mac, BWN_MACCTL,
6647 BWN_READ_4(mac, BWN_MACCTL)
6649 BWN_READ_4(mac, BWN_MACCTL);
6651 tmp = BWN_READ_4(mac, BWN_INTR_REASON);
6657 tmp = BWN_READ_4(mac, BWN_INTR_REASON);
6665 mac->mac_suspended++;
6669 bwn_mac_enable(struct bwn_mac *mac)
6671 struct bwn_softc *sc = mac->mac_sc;
6674 state = bwn_shm_read_2(mac, BWN_SHARED,
6680 mac->mac_suspended--;
6681 KASSERT(mac->mac_suspended >= 0,
6683 if (mac->mac_suspended == 0) {
6684 BWN_WRITE_4(mac, BWN_MACCTL,
6685 BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_ON);
6686 BWN_WRITE_4(mac, BWN_INTR_REASON, BWN_INTR_MAC_SUSPENDED);
6687 BWN_READ_4(mac, BWN_MACCTL);
6688 BWN_READ_4(mac, BWN_INTR_REASON);
6689 bwn_psctl(mac, 0);
6694 bwn_psctl(struct bwn_mac *mac, uint32_t flags)
6696 struct bwn_softc *sc = mac->mac_sc;
6707 BWN_WRITE_4(mac, BWN_MACCTL,
6708 (BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_AWAKE) &
6710 BWN_READ_4(mac, BWN_MACCTL);
6713 ucstat = bwn_shm_read_2(mac, BWN_SHARED,
6723 bwn_nrssi_read(struct bwn_mac *mac, uint16_t offset)
6726 BWN_PHY_WRITE(mac, BWN_PHY_NRSSI_CTRL, offset);
6727 return ((int16_t)BWN_PHY_READ(mac, BWN_PHY_NRSSI_DATA));
6731 bwn_nrssi_threshold(struct bwn_mac *mac)
6733 struct bwn_phy *phy = &mac->mac_phy;
6735 struct bwn_softc *sc = mac->mac_sc;
6766 tmpu16 = BWN_PHY_READ(mac, 0x048a) & 0xf000;
6769 BWN_PHY_WRITE(mac, 0x048a, tmpu16);
6773 tmp16 = bwn_nrssi_read(mac, 0x20);
6776 BWN_PHY_SETMASK(mac, 0x048a, 0xf000, (tmp16 < 3) ? 0x09eb : 0x0aed);
6780 bwn_nrssi_slope_11g(struct bwn_mac *mac)
6793 struct bwn_phy *phy = &mac->mac_phy;
6809 bwn_nrssi_offset(mac);
6811 BWN_PHY_MASK(mac, BWN_PHY_G_CRS, 0x7fff);
6812 BWN_PHY_MASK(mac, 0x0802, 0xfffc);
6817 ant_div = BWN_READ_2(mac, 0x03e2);
6818 BWN_WRITE_2(mac, 0x03e2, BWN_READ_2(mac, 0x03e2) | 0x8000);
6820 save_rf[i] = BWN_RF_READ(mac, save_rf_regs[i]);
6822 save_phy_comm[i] = BWN_PHY_READ(mac, save_phy_comm_regs[i]);
6824 phy0 = BWN_READ_2(mac, BWN_PHY0);
6825 chan_ex = BWN_READ_2(mac, BWN_CHANNEL_EXT);
6828 save_phy3[i] = BWN_PHY_READ(mac, save_phy3_regs[i]);
6829 BWN_PHY_WRITE(mac, 0x002e, 0);
6830 BWN_PHY_WRITE(mac, BWN_PHY_G_LOCTL, 0);
6835 BWN_PHY_SET(mac, 0x0478, 0x0100);
6836 BWN_PHY_SET(mac, 0x0801, 0x0040);
6840 BWN_PHY_MASK(mac, 0x0801, 0xffbf);
6843 BWN_PHY_SET(mac, 0x0060, 0x0040);
6844 BWN_PHY_SET(mac, 0x0014, 0x0200);
6849 BWN_RF_SET(mac, 0x007a, 0x0070);
6850 bwn_set_all_gains(mac, 0, 8, 0);
6851 BWN_RF_MASK(mac, 0x007a, 0x00f7);
6853 BWN_PHY_SETMASK(mac, 0x0811, 0xffcf, 0x0030);
6854 BWN_PHY_SETMASK(mac, 0x0812, 0xffcf, 0x0010);
6856 BWN_RF_SET(mac, 0x007a, 0x0080);
6859 nrssi0 = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f);
6866 BWN_RF_MASK(mac, 0x007a, 0x007f);
6868 BWN_PHY_SETMASK(mac, 0x0003, 0xff9f, 0x0040);
6870 BWN_WRITE_2(mac, BWN_CHANNEL_EXT,
6871 BWN_READ_2(mac, BWN_CHANNEL_EXT) | 0x2000);
6872 BWN_RF_SET(mac, 0x007a, 0x000f);
6873 BWN_PHY_WRITE(mac, 0x0015, 0xf330);
6875 BWN_PHY_SETMASK(mac, 0x0812, 0xffcf, 0x0020);
6876 BWN_PHY_SETMASK(mac, 0x0811, 0xffcf, 0x0020);
6879 bwn_set_all_gains(mac, 3, 0, 1);
6881 BWN_RF_WRITE(mac, 0x0043, 0x001f);
6883 tmp = BWN_RF_READ(mac, 0x0052) & 0xff0f;
6884 BWN_RF_WRITE(mac, 0x0052, tmp | 0x0060);
6885 tmp = BWN_RF_READ(mac, 0x0043) & 0xfff0;
6886 BWN_RF_WRITE(mac, 0x0043, tmp | 0x0009);
6888 BWN_PHY_WRITE(mac, 0x005a, 0x0480);
6889 BWN_PHY_WRITE(mac, 0x0059, 0x0810);
6890 BWN_PHY_WRITE(mac, 0x0058, 0x000d);
6892 nrssi1 = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f);
6913 BWN_PHY_WRITE(mac, save_phy3_regs[phy3_idx],
6918 BWN_PHY_MASK(mac, 0x0812, 0xffcf);
6919 BWN_PHY_MASK(mac, 0x0811, 0xffcf);
6923 BWN_RF_WRITE(mac, save_rf_regs[i], save_rf[i]);
6925 BWN_WRITE_2(mac, 0x03e2, ant_div);
6926 BWN_WRITE_2(mac, 0x03e6, phy0);
6927 BWN_WRITE_2(mac, BWN_CHANNEL_EXT, chan_ex);
6930 BWN_PHY_WRITE(mac, save_phy_comm_regs[i], save_phy_comm[i]);
6932 bwn_spu_workaround(mac, phy->chan);
6933 BWN_PHY_SET(mac, 0x0802, (0x0001 | 0x0002));
6934 bwn_set_original_gains(mac);
6935 BWN_PHY_SET(mac, BWN_PHY_G_CRS, 0x8000);
6938 BWN_PHY_WRITE(mac, save_phy3_regs[phy3_idx],
6950 bwn_nrssi_threshold(mac);
6957 bwn_nrssi_offset(struct bwn_mac *mac)
6973 struct bwn_phy *phy = &mac->mac_phy;
6982 save_phy_comm[i] = BWN_PHY_READ(mac, save_phy_comm_regs[i]);
6984 save_rf[i] = BWN_RF_READ(mac, save_rf_regs[i]);
6986 BWN_PHY_MASK(mac, 0x0429, 0x7fff);
6987 BWN_PHY_SETMASK(mac, 0x0001, 0x3fff, 0x4000);
6988 BWN_PHY_SET(mac, 0x0811, 0x000c);
6989 BWN_PHY_SETMASK(mac, 0x0812, 0xfff3, 0x0004);
6990 BWN_PHY_MASK(mac, 0x0802, ~(0x1 | 0x2));
6993 save_phy6[i] = BWN_PHY_READ(mac, save_phy6_regs[i]);
6995 BWN_PHY_WRITE(mac, 0x002e, 0);
6996 BWN_PHY_WRITE(mac, 0x002f, 0);
6997 BWN_PHY_WRITE(mac, 0x080f, 0);
6998 BWN_PHY_WRITE(mac, 0x0810, 0);
6999 BWN_PHY_SET(mac, 0x0478, 0x0100);
7000 BWN_PHY_SET(mac, 0x0801, 0x0040);
7001 BWN_PHY_SET(mac, 0x0060, 0x0040);
7002 BWN_PHY_SET(mac, 0x0014, 0x0200);
7004 BWN_RF_SET(mac, 0x007a, 0x0070);
7005 BWN_RF_SET(mac, 0x007a, 0x0080);
7008 nrssi = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f);
7013 BWN_RF_WRITE(mac, 0x007b, i);
7015 nrssi = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) &
7025 BWN_RF_MASK(mac, 0x007a, 0x007f);
7027 BWN_PHY_SET(mac, 0x0814, 0x0001);
7028 BWN_PHY_MASK(mac, 0x0815, 0xfffe);
7030 BWN_PHY_SET(mac, 0x0811, 0x000c);
7031 BWN_PHY_SET(mac, 0x0812, 0x000c);
7032 BWN_PHY_SET(mac, 0x0811, 0x0030);
7033 BWN_PHY_SET(mac, 0x0812, 0x0030);
7034 BWN_PHY_WRITE(mac, 0x005a, 0x0480);
7035 BWN_PHY_WRITE(mac, 0x0059, 0x0810);
7036 BWN_PHY_WRITE(mac, 0x0058, 0x000d);
7038 BWN_PHY_WRITE(mac, 0x0003, 0x0122);
7040 BWN_PHY_SET(mac, 0x000a, 0x2000);
7042 BWN_PHY_SET(mac, 0x0814, 0x0004);
7043 BWN_PHY_MASK(mac, 0x0815, 0xfffb);
7045 BWN_PHY_SETMASK(mac, 0x0003, 0xff9f, 0x0040);
7046 BWN_RF_SET(mac, 0x007a, 0x000f);
7047 bwn_set_all_gains(mac, 3, 0, 1);
7048 BWN_RF_SETMASK(mac, 0x0043, 0x00f0, 0x000f);
7050 nrssi = (int16_t) ((BWN_PHY_READ(mac, 0x047f) >> 8) & 0x003f);
7055 BWN_RF_WRITE(mac, 0x007b, i);
7057 nrssi = (int16_t)((BWN_PHY_READ(mac,
7069 BWN_RF_WRITE(mac, 0x007b, saved);
7076 BWN_PHY_WRITE(mac, save_phy6_regs[phy6_idx],
7082 BWN_PHY_WRITE(mac, save_phy_comm_regs[i],
7086 BWN_PHY_WRITE(mac, save_phy_comm_regs[i], save_phy_comm[i]);
7089 BWN_RF_WRITE(mac, save_rf_regs[i], save_rf[i]);
7091 BWN_PHY_WRITE(mac, 0x0802, BWN_PHY_READ(mac, 0x0802) | 0x1 | 0x2);
7092 BWN_PHY_SET(mac, 0x0429, 0x8000);
7093 bwn_set_original_gains(mac);
7096 BWN_PHY_WRITE(mac, save_phy6_regs[phy6_idx],
7101 BWN_PHY_WRITE(mac, save_phy_comm_regs[0], save_phy_comm[0]);
7102 BWN_PHY_WRITE(mac, save_phy_comm_regs[2], save_phy_comm[2]);
7103 BWN_PHY_WRITE(mac, save_phy_comm_regs[1], save_phy_comm[1]);
7107 bwn_set_all_gains(struct bwn_mac *mac, int16_t first, int16_t second,
7110 struct bwn_phy *phy = &mac->mac_phy;
7125 bwn_ofdmtab_write_2(mac, table, i, first);
7128 bwn_ofdmtab_write_2(mac, table, i, second);
7132 BWN_PHY_SETMASK(mac, 0x04a0, 0xbfbf, tmp);
7133 BWN_PHY_SETMASK(mac, 0x04a1, 0xbfbf, tmp);
7134 BWN_PHY_SETMASK(mac, 0x04a2, 0xbfbf, tmp);
7136 bwn_dummy_transmission(mac, 0, 1);
7140 bwn_set_original_gains(struct bwn_mac *mac)
7142 struct bwn_phy *phy = &mac->mac_phy;
7160 bwn_ofdmtab_write_2(mac, table, i, tmp);
7164 bwn_ofdmtab_write_2(mac, table, i, i - start);
7166 BWN_PHY_SETMASK(mac, 0x04a0, 0xbfbf, 0x4040);
7167 BWN_PHY_SETMASK(mac, 0x04a1, 0xbfbf, 0x4040);
7168 BWN_PHY_SETMASK(mac, 0x04a2, 0xbfbf, 0x4000);
7169 bwn_dummy_transmission(mac, 0, 1);
7173 bwn_phy_hwpctl_init(struct bwn_mac *mac)
7175 struct bwn_phy *phy = &mac->mac_phy;
7179 struct bwn_softc *sc = mac->mac_sc;
7189 BWN_PHY_WRITE(mac, 0x0028, 0x8018);
7191 BWN_WRITE_2(mac, BWN_PHY0, BWN_READ_2(mac, BWN_PHY0) & 0xffdf);
7195 bwn_hwpctl_early_init(mac);
7198 BWN_RF_SETMASK(mac, 0x0076, 0x00f7, 0x0084);
7212 bwn_phy_g_set_txpwr_sub(mac, &bbatt, &rfatt, 0);
7214 bwn_dummy_transmission(mac, 0, 1);
7215 pg->pg_curtssi = BWN_PHY_READ(mac, BWN_PHY_TSSI);
7217 BWN_RF_MASK(mac, 0x0076, 0xff7b);
7219 bwn_phy_g_set_txpwr_sub(mac, &old_bbatt,
7222 bwn_hwpctl_init_gphy(mac);
7225 bwn_shm_write_2(mac, BWN_SHARED, 0x0058, 0x7f7f);
7226 bwn_shm_write_2(mac, BWN_SHARED, 0x005a, 0x7f7f);
7227 bwn_shm_write_2(mac, BWN_SHARED, 0x0070, 0x7f7f);
7228 bwn_shm_write_2(mac, BWN_SHARED, 0x0072, 0x7f7f);
7232 bwn_hwpctl_early_init(struct bwn_mac *mac)
7234 struct bwn_phy *phy = &mac->mac_phy;
7236 if (!bwn_has_hwpctl(mac)) {
7237 BWN_PHY_WRITE(mac, 0x047a, 0xc111);
7241 BWN_PHY_MASK(mac, 0x0036, 0xfeff);
7242 BWN_PHY_WRITE(mac, 0x002f, 0x0202);
7243 BWN_PHY_SET(mac, 0x047c, 0x0002);
7244 BWN_PHY_SET(mac, 0x047a, 0xf000);
7246 BWN_PHY_SETMASK(mac, 0x047a, 0xff0f, 0x0010);
7247 BWN_PHY_SET(mac, 0x005d, 0x8000);
7248 BWN_PHY_SETMASK(mac, 0x004e, 0xffc0, 0x0010);
7249 BWN_PHY_WRITE(mac, 0x002e, 0xc07f);
7250 BWN_PHY_SET(mac, 0x0036, 0x0400);
7252 BWN_PHY_SET(mac, 0x0036, 0x0200);
7253 BWN_PHY_SET(mac, 0x0036, 0x0400);
7254 BWN_PHY_MASK(mac, 0x005d, 0x7fff);
7255 BWN_PHY_MASK(mac, 0x004f, 0xfffe);
7256 BWN_PHY_SETMASK(mac, 0x004e, 0xffc0, 0x0010);
7257 BWN_PHY_WRITE(mac, 0x002e, 0xc07f);
7258 BWN_PHY_SETMASK(mac, 0x047a, 0xff0f, 0x0010);
7263 bwn_hwpctl_init_gphy(struct bwn_mac *mac)
7265 struct bwn_phy *phy = &mac->mac_phy;
7272 if (!bwn_has_hwpctl(mac)) {
7273 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_HW_POWERCTL);
7277 BWN_PHY_SETMASK(mac, 0x0036, 0xffc0,
7279 BWN_PHY_SETMASK(mac, 0x0478, 0xff00,
7283 bwn_ofdmtab_write_2(mac, 0x3c20, i, pg->pg_tssi2dbm[i]);
7285 bwn_ofdmtab_write_2(mac, 0x3c00, i - 32, pg->pg_tssi2dbm[i]);
7289 BWN_PHY_WRITE(mac, 0x380 + (i / 2), value);
7303 BWN_PHY_WRITE(mac, 0x3c0 + nr_written, tmp);
7308 BWN_PHY_MASK(mac, 0x0060, 0xffbf);
7309 BWN_PHY_WRITE(mac, 0x0014, 0x0000);
7312 BWN_PHY_SET(mac, 0x0478, 0x0800);
7313 BWN_PHY_MASK(mac, 0x0478, 0xfeff);
7314 BWN_PHY_MASK(mac, 0x0801, 0xffbf);
7316 bwn_phy_g_dc_lookup_init(mac, 1);
7317 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_HW_POWERCTL);
7321 bwn_phy_g_switch_chan(struct bwn_mac *mac, int channel, uint8_t spu)
7323 struct bwn_softc *sc = mac->mac_sc;
7326 bwn_spu_workaround(mac, channel);
7328 BWN_WRITE_2(mac, BWN_CHANNEL, bwn_phy_g_chan2freq(channel));
7332 bwn_hf_write(mac,
7333 bwn_hf_read(mac) & ~BWN_HF_JAPAN_CHAN14_OFF);
7335 bwn_hf_write(mac,
7336 bwn_hf_read(mac) | BWN_HF_JAPAN_CHAN14_OFF);
7337 BWN_WRITE_2(mac, BWN_CHANNEL_EXT,
7338 BWN_READ_2(mac, BWN_CHANNEL_EXT) | (1 << 11));
7342 BWN_WRITE_2(mac, BWN_CHANNEL_EXT,
7343 BWN_READ_2(mac, BWN_CHANNEL_EXT) & 0xf7bf);
7358 bwn_phy_g_set_txpwr_sub(struct bwn_mac *mac, const struct bwn_bbatt *bbatt,
7361 struct bwn_phy *phy = &mac->mac_phy;
7378 bwn_phy_g_set_bbatt(mac, bb);
7379 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_RADIO_ATT, rf);
7381 BWN_RF_WRITE(mac, 0x43, (rf & 0x000f) | (txctl & 0x0070));
7383 BWN_RF_SETMASK(mac, 0x43, 0xfff0, (rf & 0x000f));
7384 BWN_RF_SETMASK(mac, 0x52, ~0x0070, (txctl & 0x0070));
7387 BWN_RF_WRITE(mac, 0x52, tx_magn | tx_bias);
7389 BWN_RF_SETMASK(mac, 0x52, 0xfff0, (tx_bias & 0x000f));
7390 bwn_lo_g_adjust(mac);
7394 bwn_phy_g_set_bbatt(struct bwn_mac *mac,
7397 struct bwn_phy *phy = &mac->mac_phy;
7400 BWN_WRITE_2(mac, BWN_PHY0,
7401 (BWN_READ_2(mac, BWN_PHY0) & 0xfff0) | bbatt);
7405 BWN_PHY_SETMASK(mac, BWN_PHY_DACCTL, 0xffc3, bbatt << 2);
7408 BWN_PHY_SETMASK(mac, BWN_PHY_DACCTL, 0xff87, bbatt << 3);
7412 bwn_rf_2050_rfoverval(struct bwn_mac *mac, uint16_t reg, uint32_t lpd)
7414 struct bwn_phy *phy = &mac->mac_phy;
7416 struct bwn_softc *sc = mac->mac_sc;
7533 bwn_spu_workaround(struct bwn_mac *mac, uint8_t channel)
7536 if (mac->mac_phy.rf_ver != 0x2050 || mac->mac_phy.rf_rev >= 6)
7538 BWN_WRITE_2(mac, BWN_CHANNEL, (channel <= 10) ?
7541 BWN_WRITE_2(mac, BWN_CHANNEL, bwn_phy_g_chan2freq(channel));
7545 bwn_fw_gets(struct bwn_mac *mac, enum bwn_fwtype type)
7547 struct bwn_softc *sc = mac->mac_sc;
7548 struct bwn_fw *fw = &mac->mac_fw;
7567 bwn_release_firmware(mac);
7570 error = bwn_fw_get(mac, type, filename, &fw->ucode);
7572 bwn_release_firmware(mac);
7579 error = bwn_fw_get(mac, type, "pcm5", &fw->pcm);
7583 bwn_release_firmware(mac);
7593 switch (mac->mac_phy.type) {
7629 error = bwn_fw_get(mac, type, filename, &fw->initvals);
7631 bwn_release_firmware(mac);
7636 switch (mac->mac_phy.type) {
7675 error = bwn_fw_get(mac, type, filename, &fw->initvals_band);
7677 bwn_release_firmware(mac);
7683 bwn_release_firmware(mac);
7688 bwn_fw_get(struct bwn_mac *mac, enum bwn_fwtype type,
7692 struct bwn_softc *sc = mac->mac_sc;
7708 (mac->mac_phy.type == BWN_PHYTYPE_LP) ? "lp_" : "", name);
7745 bwn_release_firmware(struct bwn_mac *mac)
7748 bwn_do_release_fw(&mac->mac_fw.ucode);
7749 bwn_do_release_fw(&mac->mac_fw.pcm);
7750 bwn_do_release_fw(&mac->mac_fw.initvals);
7751 bwn_do_release_fw(&mac->mac_fw.initvals_band);
7765 bwn_fw_loaducode(struct bwn_mac *mac)
7771 struct bwn_softc *sc = mac->mac_sc;
7778 ctl = BWN_READ_4(mac, BWN_MACCTL);
7782 BWN_WRITE_4(mac, BWN_MACCTL, ctl);
7784 bwn_shm_write_2(mac, BWN_SCRATCH, i, 0);
7786 bwn_shm_write_2(mac, BWN_SHARED, i, 0);
7788 data = GETFWOFFSET(mac->mac_fw.ucode, sizeof(struct bwn_fwhdr));
7789 bwn_shm_ctlword(mac, BWN_UCODE | BWN_SHARED_AUTOINC, 0x0000);
7790 for (i = 0; i < GETFWSIZE(mac->mac_fw.ucode, sizeof(struct bwn_fwhdr));
7792 BWN_WRITE_4(mac, BWN_SHM_DATA, be32toh(data[i]));
7796 if (mac->mac_fw.pcm.fw) {
7797 data = GETFWOFFSET(mac->mac_fw.pcm, sizeof(struct bwn_fwhdr));
7798 bwn_shm_ctlword(mac, BWN_HW, 0x01ea);
7799 BWN_WRITE_4(mac, BWN_SHM_DATA, 0x00004000);
7800 bwn_shm_ctlword(mac, BWN_HW, 0x01eb);
7801 for (i = 0; i < GETFWSIZE(mac->mac_fw.pcm,
7803 BWN_WRITE_4(mac, BWN_SHM_DATA, be32toh(data[i]));
7808 BWN_WRITE_4(mac, BWN_INTR_REASON, BWN_INTR_ALL);
7809 BWN_WRITE_4(mac, BWN_MACCTL,
7810 (BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_MCODE_JMP0) |
7814 if (BWN_READ_4(mac, BWN_INTR_REASON) == BWN_INTR_MAC_SUSPENDED)
7823 BWN_READ_4(mac, BWN_INTR_REASON);
7825 mac->mac_fw.rev = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_UCODE_REV);
7826 if (mac->mac_fw.rev <= 0x128) {
7831 mac->mac_fw.patch = bwn_shm_read_2(mac, BWN_SHARED,
7833 date = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_UCODE_DATE);
7834 mac->mac_fw.opensource = (date == 0xffff);
7836 mac->mac_flags |= BWN_MAC_FLAG_WME;
7837 mac->mac_flags |= BWN_MAC_FLAG_HWCRYPTO;
7839 time = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_UCODE_TIME);
7840 if (mac->mac_fw.opensource == 0) {
7843 mac->mac_fw.rev, mac->mac_fw.patch, date, time);
7844 if (mac->mac_fw.no_pcmfile)
7848 mac->mac_fw.patch = time;
7849 fwcaps = bwn_fwcaps_read(mac);
7850 if (!(fwcaps & BWN_FWCAPS_HWCRYPTO) || mac->mac_fw.no_pcmfile) {
7853 mac->mac_flags &= ~BWN_MAC_FLAG_HWCRYPTO;
7857 mac->mac_flags &= ~BWN_MAC_FLAG_WME;
7861 if (BWN_ISOLDFMT(mac))
7867 BWN_WRITE_4(mac, BWN_MACCTL,
7868 (BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_MCODE_RUN) |
7878 bwn_fwcaps_read(struct bwn_mac *mac)
7881 KASSERT(mac->mac_fw.opensource == 1,
7883 return (bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_FWCAPS));
7887 bwn_fwinitvals_write(struct bwn_mac *mac, const struct bwn_fwinitvals *ivals,
7896 struct bwn_softc *sc = mac->mac_sc;
7918 BWN_WRITE_4(mac, offset, be32toh(iv->data.d32));
7925 BWN_WRITE_2(mac, offset, be16toh(iv->data.d16));
7941 bwn_switch_channel(struct bwn_mac *mac, int chan)
7943 struct bwn_phy *phy = &(mac->mac_phy);
7944 struct bwn_softc *sc = mac->mac_sc;
7951 chan = phy->get_default_chan(mac);
7956 savedcookie = bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_CHAN);
7957 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_CHAN, channelcookie);
7958 error = phy->switch_channel(mac, chan);
7962 mac->mac_phy.chan = chan;
7967 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_CHAN, savedcookie);
7992 bwn_wme_load(struct bwn_mac *mac)
7994 struct bwn_softc *sc = mac->mac_sc;
8000 bwn_mac_suspend(mac);
8002 bwn_wme_loadparams(mac, &(sc->sc_wmeParams[i]),
8004 bwn_mac_enable(mac);
8008 bwn_wme_loadparams(struct bwn_mac *mac,
8012 struct bwn_softc *sc = mac->mac_sc;
8017 slot = BWN_READ_2(mac, BWN_RNG) &
8036 tmp = bwn_shm_read_2(mac, BWN_SHARED,
8039 bwn_shm_write_2(mac, BWN_SHARED, shm_offset + (i * 2),
8042 bwn_shm_write_2(mac, BWN_SHARED, shm_offset + (i * 2),
8049 bwn_mac_write_bssid(struct bwn_mac *mac)
8051 struct bwn_softc *sc = mac->mac_sc;
8056 bwn_mac_setfilter(mac, BWN_MACFILTER_BSSID, sc->sc_bssid);
8066 bwn_ram_write(mac, 0x20 + i, tmp);
8071 bwn_mac_setfilter(struct bwn_mac *mac, uint16_t offset,
8077 if (!mac)
8081 BWN_WRITE_2(mac, BWN_MACFILTER_CONTROL, offset);
8085 BWN_WRITE_2(mac, BWN_MACFILTER_DATA, data);
8088 BWN_WRITE_2(mac, BWN_MACFILTER_DATA, data);
8091 BWN_WRITE_2(mac, BWN_MACFILTER_DATA, data);
8095 bwn_key_dowrite(struct bwn_mac *mac, uint8_t index, uint8_t algorithm,
8101 if (BWN_SEC_NEWAPI(mac))
8104 KASSERT(index < mac->mac_max_nr_keys,
8110 bwn_key_macwrite(mac, index, NULL);
8113 bwn_key_write(mac, index, algorithm, buf);
8115 bwn_key_macwrite(mac, index, mac_addr);
8117 mac->mac_key[index].algorithm = algorithm;
8121 bwn_key_macwrite(struct bwn_mac *mac, uint8_t index, const uint8_t *addr)
8123 struct bwn_softc *sc = mac->mac_sc;
8127 if (BWN_SEC_NEWAPI(mac))
8144 bwn_shm_write_4(mac, BWN_RCMTA, (index * 2) + 0, addrtmp[0]);
8145 bwn_shm_write_2(mac, BWN_RCMTA, (index * 2) + 1, addrtmp[1]);
8148 bwn_shm_write_4(mac, BWN_SHARED,
8150 bwn_shm_write_2(mac, BWN_SHARED,
8157 bwn_key_write(struct bwn_mac *mac, uint8_t index, uint8_t algorithm,
8164 kidx = BWN_SEC_KEY2FW(mac, index);
8165 bwn_shm_write_2(mac, BWN_SHARED,
8168 offset = mac->mac_ktp + (index * BWN_SEC_KEYSIZE);
8172 bwn_shm_write_2(mac, BWN_SHARED, offset + i, value);
8177 bwn_phy_exit(struct bwn_mac *mac)
8180 mac->mac_phy.rf_onoff(mac, 0);
8181 if (mac->mac_phy.exit != NULL)
8182 mac->mac_phy.exit(mac);
8186 bwn_dma_free(struct bwn_mac *mac)
8190 if ((mac->mac_flags & BWN_MAC_FLAG_DMA) == 0)
8192 dma = &mac->mac_method.dma;
8203 bwn_core_stop(struct bwn_mac *mac)
8205 struct bwn_softc *sc = mac->mac_sc;
8209 if (mac->mac_status < BWN_MAC_STATUS_STARTED)
8216 BWN_WRITE_4(mac, BWN_INTR_MASK, 0);
8217 BWN_READ_4(mac, BWN_INTR_MASK);
8218 bwn_mac_suspend(mac);
8220 mac->mac_status = BWN_MAC_STATUS_INITED;
8228 struct bwn_mac *mac;
8234 TAILQ_FOREACH(mac, &sc->sc_maclist, mac_list) {
8236 mac->mac_phy.supports_2ghz) {
8237 up_dev = mac;
8240 mac->mac_phy.supports_5ghz) {
8241 up_dev = mac;
8292 bwn_rf_turnon(struct bwn_mac *mac)
8295 bwn_mac_suspend(mac);
8296 mac->mac_phy.rf_onoff(mac, 1);
8297 mac->mac_phy.rf_on = 1;
8298 bwn_mac_enable(mac);
8302 bwn_rf_turnoff(struct bwn_mac *mac)
8305 bwn_mac_suspend(mac);
8306 mac->mac_phy.rf_onoff(mac, 0);
8307 mac->mac_phy.rf_on = 0;
8308 bwn_mac_enable(mac);
8312 bwn_phy_reset(struct bwn_mac *mac)
8314 struct bwn_softc *sc = mac->mac_sc;
8334 struct bwn_mac *mac = sc->sc_curmac;
8347 bwn_led_newstate(mac, nstate);
8362 bwn_set_macaddr(mac);
8373 bwn_set_opmode(mac);
8374 bwn_set_pretbtt(mac);
8375 bwn_spu_setdelay(mac, 0);
8376 bwn_set_macaddr(mac);
8385 bwn_set_pretbtt(struct bwn_mac *mac)
8387 struct bwn_softc *sc = mac->mac_sc;
8394 pretbtt = (mac->mac_phy.type == BWN_PHYTYPE_A) ? 120 : 250;
8395 bwn_shm_write_2(mac, BWN_SHARED, BWN_SHARED_PRETBTT, pretbtt);
8396 BWN_WRITE_2(mac, BWN_TSF_CFP_PRETBTT, pretbtt);
8402 struct bwn_mac *mac = arg;
8403 struct bwn_softc *sc = mac->mac_sc;
8406 if (mac->mac_status < BWN_MAC_STATUS_STARTED ||
8410 reason = BWN_READ_4(mac, BWN_INTR_REASON);
8413 reason &= mac->mac_intr_mask;
8417 mac->mac_reason[0] = BWN_READ_4(mac, BWN_DMA0_REASON) & 0x0001dc00;
8418 mac->mac_reason[1] = BWN_READ_4(mac, BWN_DMA1_REASON) & 0x0000dc00;
8419 mac->mac_reason[2] = BWN_READ_4(mac, BWN_DMA2_REASON) & 0x0000dc00;
8420 mac->mac_reason[3] = BWN_READ_4(mac, BWN_DMA3_REASON) & 0x0001dc00;
8421 mac->mac_reason[4] = BWN_READ_4(mac, BWN_DMA4_REASON) & 0x0000dc00;
8422 BWN_WRITE_4(mac, BWN_INTR_REASON, reason);
8423 BWN_WRITE_4(mac, BWN_DMA0_REASON, mac->mac_reason[0]);
8424 BWN_WRITE_4(mac, BWN_DMA1_REASON, mac->mac_reason[1]);
8425 BWN_WRITE_4(mac, BWN_DMA2_REASON, mac->mac_reason[2]);
8426 BWN_WRITE_4(mac, BWN_DMA3_REASON, mac->mac_reason[3]);
8427 BWN_WRITE_4(mac, BWN_DMA4_REASON, mac->mac_reason[4]);
8430 BWN_WRITE_4(mac, BWN_INTR_MASK, 0);
8432 mac->mac_reason_intr = reason;
8434 BWN_BARRIER(mac, BUS_SPACE_BARRIER_READ);
8435 BWN_BARRIER(mac, BUS_SPACE_BARRIER_WRITE);
8437 taskqueue_enqueue_fast(sc->sc_tq, &mac->mac_intrtask);
8444 struct bwn_mac *mac = arg;
8445 struct bwn_softc *sc = mac->mac_sc;
8451 if (mac->mac_status < BWN_MAC_STATUS_STARTED ||
8457 for (i = 0; i < N(mac->mac_reason); i++)
8458 merged |= mac->mac_reason[i];
8460 if (mac->mac_reason_intr & BWN_INTR_MAC_TXERR)
8463 if (mac->mac_reason_intr & BWN_INTR_PHY_TXERR) {
8465 mac->mac_phy.txerrors--;
8466 if (mac->mac_phy.txerrors == 0) {
8467 mac->mac_phy.txerrors = BWN_TXERROR_MAX;
8468 bwn_restart(mac, "PHY TX errors");
8476 mac->mac_reason[0], mac->mac_reason[1],
8477 mac->mac_reason[2], mac->mac_reason[3],
8478 mac->mac_reason[4], mac->mac_reason[5]);
8479 bwn_restart(mac, "DMA error");
8486 mac->mac_reason[0], mac->mac_reason[1],
8487 mac->mac_reason[2], mac->mac_reason[3],
8488 mac->mac_reason[4], mac->mac_reason[5]);
8492 if (mac->mac_reason_intr & BWN_INTR_UCODE_DEBUG)
8493 bwn_intr_ucode_debug(mac);
8494 if (mac->mac_reason_intr & BWN_INTR_TBTT_INDI)
8495 bwn_intr_tbtt_indication(mac);
8496 if (mac->mac_reason_intr & BWN_INTR_ATIM_END)
8497 bwn_intr_atim_end(mac);
8498 if (mac->mac_reason_intr & BWN_INTR_BEACON)
8499 bwn_intr_beacon(mac);
8500 if (mac->mac_reason_intr & BWN_INTR_PMQ)
8501 bwn_intr_pmq(mac);
8502 if (mac->mac_reason_intr & BWN_INTR_NOISESAMPLE_OK)
8503 bwn_intr_noise(mac);
8505 if (mac->mac_flags & BWN_MAC_FLAG_DMA) {
8506 if (mac->mac_reason[0] & BWN_DMAINTR_RX_DONE) {
8507 bwn_dma_rx(mac->mac_method.dma.rx);
8511 rx = bwn_pio_rx(&mac->mac_method.pio.rx);
8513 KASSERT(!(mac->mac_reason[1] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
8514 KASSERT(!(mac->mac_reason[2] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
8515 KASSERT(!(mac->mac_reason[3] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
8516 KASSERT(!(mac->mac_reason[4] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
8517 KASSERT(!(mac->mac_reason[5] & BWN_DMAINTR_RX_DONE), ("%s", __func__));
8519 if (mac->mac_reason_intr & BWN_INTR_TX_OK) {
8520 bwn_intr_txeof(mac);
8524 BWN_WRITE_4(mac, BWN_INTR_MASK, mac->mac_intr_mask);
8543 bwn_led_event(mac, evt);
8551 BWN_BARRIER(mac, BUS_SPACE_BARRIER_READ);
8552 BWN_BARRIER(mac, BUS_SPACE_BARRIER_WRITE);
8558 bwn_restart(struct bwn_mac *mac, const char *msg)
8560 struct bwn_softc *sc = mac->mac_sc;
8564 if (mac->mac_status < BWN_MAC_STATUS_INITED)
8568 ieee80211_runtask(ic, &mac->mac_hwreset);
8572 bwn_intr_ucode_debug(struct bwn_mac *mac)
8574 struct bwn_softc *sc = mac->mac_sc;
8577 if (mac->mac_fw.opensource == 0)
8580 reason = bwn_shm_read_2(mac, BWN_SCRATCH, BWN_DEBUGINTR_REASON_REG);
8583 bwn_handle_fwpanic(mac);
8599 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_DEBUGINTR_REASON_REG,
8604 bwn_intr_tbtt_indication(struct bwn_mac *mac)
8606 struct bwn_softc *sc = mac->mac_sc;
8610 bwn_psctl(mac, 0);
8612 mac->mac_flags |= BWN_MAC_FLAG_DFQVALID;
8616 bwn_intr_atim_end(struct bwn_mac *mac)
8619 if (mac->mac_flags & BWN_MAC_FLAG_DFQVALID) {
8620 BWN_WRITE_4(mac, BWN_MACCMD,
8621 BWN_READ_4(mac, BWN_MACCMD) | BWN_MACCMD_DFQ_VALID);
8622 mac->mac_flags &= ~BWN_MAC_FLAG_DFQVALID;
8627 bwn_intr_beacon(struct bwn_mac *mac)
8629 struct bwn_softc *sc = mac->mac_sc;
8637 mac->mac_intr_mask &= ~BWN_INTR_BEACON;
8639 cmd = BWN_READ_4(mac, BWN_MACCMD);
8644 BWN_WRITE_4(mac, BWN_INTR_REASON, BWN_INTR_BEACON);
8645 mac->mac_intr_mask |= BWN_INTR_BEACON;
8651 bwn_load_beacon0(mac);
8652 bwn_load_beacon1(mac);
8653 cmd = BWN_READ_4(mac, BWN_MACCMD);
8655 BWN_WRITE_4(mac, BWN_MACCMD, cmd);
8658 bwn_load_beacon0(mac);
8659 cmd = BWN_READ_4(mac, BWN_MACCMD);
8661 BWN_WRITE_4(mac, BWN_MACCMD, cmd);
8663 bwn_load_beacon1(mac);
8664 cmd = BWN_READ_4(mac, BWN_MACCMD);
8666 BWN_WRITE_4(mac, BWN_MACCMD, cmd);
8672 bwn_intr_pmq(struct bwn_mac *mac)
8677 tmp = BWN_READ_4(mac, BWN_PS_STATUS);
8681 BWN_WRITE_2(mac, BWN_PS_STATUS, 0x0002);
8685 bwn_intr_noise(struct bwn_mac *mac)
8687 struct bwn_phy_g *pg = &mac->mac_phy.phy_g;
8693 if (mac->mac_phy.type != BWN_PHYTYPE_G)
8696 KASSERT(mac->mac_noise.noi_running, ("%s: fail", __func__));
8697 *((uint32_t *)noise) = htole32(bwn_jssi_read(mac));
8702 KASSERT(mac->mac_noise.noi_nsamples < 8,
8704 i = mac->mac_noise.noi_nsamples;
8709 mac->mac_noise.noi_samples[i][0] = pg->pg_nrssi_lt[noise[0]];
8710 mac->mac_noise.noi_samples[i][1] = pg->pg_nrssi_lt[noise[1]];
8711 mac->mac_noise.noi_samples[i][2] = pg->pg_nrssi_lt[noise[2]];
8712 mac->mac_noise.noi_samples[i][3] = pg->pg_nrssi_lt[noise[3]];
8713 mac->mac_noise.noi_nsamples++;
8714 if (mac->mac_noise.noi_nsamples == 8) {
8718 average += mac->mac_noise.noi_samples[i][j];
8721 tmp = (bwn_shm_read_2(mac, BWN_SHARED, 0x40c) / 128) & 0x1f;
8728 mac->mac_stats.link_noise = average;
8729 mac->mac_noise.noi_running = 0;
8733 bwn_noise_gensample(mac);
8739 struct bwn_mac *mac = prq->prq_mac;
8740 struct bwn_softc *sc = mac->mac_sc;
8745 if (mac->mac_status < BWN_MAC_STATUS_STARTED)
8779 bwn_intr_txeof(struct bwn_mac *mac)
8785 BWN_ASSERT_LOCKED(mac->mac_sc);
8788 stat0 = BWN_READ_4(mac, BWN_XMITSTAT_0);
8791 stat1 = BWN_READ_4(mac, BWN_XMITSTAT_1);
8805 bwn_handle_txeof(mac, &stat);
8812 struct bwn_mac *mac = arg;
8813 struct bwn_softc *sc = mac->mac_sc;
8819 prev_status = mac->mac_status;
8821 bwn_core_stop(mac);
8823 bwn_core_exit(mac);
8826 error = bwn_core_init(mac);
8831 bwn_core_start(mac);
8841 bwn_handle_fwpanic(struct bwn_mac *mac)
8843 struct bwn_softc *sc = mac->mac_sc;
8846 reason = bwn_shm_read_2(mac, BWN_SCRATCH, BWN_FWPANIC_REASON_REG);
8850 bwn_restart(mac, "ucode panic");
8854 bwn_load_beacon0(struct bwn_mac *mac)
8861 bwn_load_beacon1(struct bwn_mac *mac)
8868 bwn_jssi_read(struct bwn_mac *mac)
8872 val = bwn_shm_read_2(mac, BWN_SHARED, 0x08a);
8874 val |= bwn_shm_read_2(mac, BWN_SHARED, 0x088);
8880 bwn_noise_gensample(struct bwn_mac *mac)
8884 bwn_shm_write_2(mac, BWN_SHARED, 0x088, (jssi & 0x0000ffff));
8885 bwn_shm_write_2(mac, BWN_SHARED, 0x08a, (jssi & 0xffff0000) >> 16);
8886 BWN_WRITE_4(mac, BWN_MACCMD,
8887 BWN_READ_4(mac, BWN_MACCMD) | BWN_MACCMD_BGNOISE);
8913 struct bwn_mac *mac = dr->dr_mac;
8914 struct bwn_softc *sc = mac->mac_sc;
8915 struct bwn_dma *dma = &mac->mac_method.dma;
8969 if (!(mac->mac_sc->sc_filters & BWN_MACCTL_PASS_BADFCS)) {
8983 bwn_handle_txeof(struct bwn_mac *mac, const struct bwn_txstatus *status)
8990 struct bwn_softc *sc = mac->mac_sc;
8991 struct bwn_stats *stats = &mac->mac_stats;
8996 BWN_ASSERT_LOCKED(mac->mac_sc);
9009 if (mac->mac_flags & BWN_MAC_FLAG_DMA) {
9011 dr = bwn_dma_parse_cookie(mac, status,
9033 bwn_dma_handle_txeof(mac, status);
9036 tq = bwn_pio_parse_cookie(mac, status->cookie, &tp);
9050 bwn_pio_handle_txeof(mac, status);
9053 bwn_phy_txpower_check(mac, 0);
9059 struct bwn_mac *mac = prq->prq_mac;
9060 struct bwn_softc *sc = mac->mac_sc;
9118 if (!(mac->mac_sc->sc_filters & BWN_MACCTL_PASS_BADFCS)) {
9178 struct bwn_mac *mac = dr->dr_mac;
9179 struct bwn_dma *dma = &mac->mac_method.dma;
9297 bwn_rxeof(struct bwn_mac *mac, struct mbuf *m, const void *_rxhdr)
9301 struct bwn_softc *sc = mac->mac_sc;
9345 BWN_ISOLDFMT(mac),
9351 rate = bwn_plcp_get_ofdmrate(mac, plcp,
9354 rate = bwn_plcp_get_cckrate(mac, plcp);
9356 if (!(mac->mac_sc->sc_filters & BWN_MACCTL_PASS_BADPLCP))
9363 bwn_rx_radiotap(mac, m, rxhdr, plcp, rate, rssi, noise);
9367 noise = mac->mac_stats.link_noise;
9387 bwn_dma_handle_txeof(struct bwn_mac *mac,
9390 struct bwn_dma *dma = &mac->mac_method.dma;
9394 struct bwn_softc *sc = mac->mac_sc;
9402 dr = bwn_dma_parse_cookie(mac, status, status->cookie, &slot);
9459 bwn_pio_handle_txeof(struct bwn_mac *mac,
9464 struct bwn_softc *sc = mac->mac_sc;
9469 tq = bwn_pio_parse_cookie(mac, status->cookie, &tp);
9473 tq->tq_used -= roundup(tp->tp_m->m_pkthdr.len + BWN_HDRSIZE(mac), 4);
9500 bwn_phy_txpower_check(struct bwn_mac *mac, uint32_t flags)
9502 struct bwn_softc *sc = mac->mac_sc;
9503 struct bwn_phy *phy = &mac->mac_phy;
9520 result = phy->recalc_txpwr(mac,
9528 ieee80211_runtask(ic, &mac->mac_txpower);
9598 bwn_set_txhdr(struct bwn_mac *mac, struct ieee80211_node *ni,
9601 const struct bwn_phy *phy = &mac->mac_phy;
9602 struct bwn_softc *sc = mac->mac_sc;
9665 bwn_plcp_genhdr(BWN_ISOLDFMT(mac) ?
9683 switch (bwn_antenna_sanitize(mac, 0)) {
9721 cts = (struct ieee80211_frame_cts *)(BWN_ISOLDFMT(mac) ?
9733 rts = (struct ieee80211_frame_rts *)(BWN_ISOLDFMT(mac) ?
9748 bwn_plcp_genhdr((struct bwn_plcp4 *)((BWN_ISOLDFMT(mac)) ?
9754 protwh = (struct ieee80211_frame *)(BWN_ISOLDFMT(mac) ?
9770 if (BWN_ISOLDFMT(mac))
9827 bwn_antenna_sanitize(struct bwn_mac *mac, uint8_t n)
9829 struct bwn_softc *sc = mac->mac_sc;
9834 if (mac->mac_phy.gmode)
9877 bwn_pio_write_multi_4(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
9880 struct bwn_softc *sc = mac->mac_sc;
9886 bwn_pio_write_4(mac, tq, BWN_PIO8_TXCTL, ctl);
9906 bwn_pio_write_4(mac, tq, BWN_PIO8_TXCTL, ctl);
9907 bwn_pio_write_4(mac, tq, BWN_PIO8_TXDATA, value);
9914 bwn_pio_write_4(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
9918 BWN_WRITE_4(mac, tq->tq_base + offset, value);
9922 bwn_pio_write_multi_2(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
9925 struct bwn_softc *sc = mac->mac_sc;
9929 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
9935 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
9936 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXDATA, data[len - 1]);
9943 bwn_pio_write_mbuf_2(struct bwn_mac *mac, struct bwn_pio_txqueue *tq,
9952 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
9961 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXDATA, data);
9968 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXCTL, ctl);
9969 BWN_PIO_WRITE_2(mac, tq, BWN_PIO_TXDATA, data);
9976 bwn_set_slot_time(struct bwn_mac *mac, uint16_t time)
9979 if (mac->mac_phy.type != BWN_PHYTYPE_G)
9981 BWN_WRITE_2(mac, 0x684, 510 + time);
9982 bwn_shm_write_2(mac, BWN_SHARED, 0x0010, time);
9986 bwn_dma_select(struct bwn_mac *mac, uint8_t prio)
9989 if ((mac->mac_flags & BWN_MAC_FLAG_WME) == 0)
9990 return (mac->mac_method.dma.wme[WME_AC_BE]);
9994 return (mac->mac_method.dma.wme[WME_AC_VO]);
9996 return (mac->mac_method.dma.wme[WME_AC_VI]);
9998 return (mac->mac_method.dma.wme[WME_AC_BE]);
10000 return (mac->mac_method.dma.wme[WME_AC_BK]);
10026 bwn_phy_shm_tssi_read(struct bwn_mac *mac, uint16_t shm_offset)
10033 tmp = bwn_shm_read_4(mac, BWN_SHARED, shm_offset);
10041 bwn_shm_write_4(mac, BWN_SHARED, shm_offset,
10054 if (bwn_shm_read_2(mac, BWN_SHARED, BWN_SHARED_HFLO)
10062 bwn_phy_g_setatt(struct bwn_mac *mac, int *bbattp, int *rfattp)
10064 struct bwn_txpwr_loctl *lo = &mac->mac_phy.phy_g.pg_loctl;
10105 bwn_phy_lock(struct bwn_mac *mac)
10107 struct bwn_softc *sc = mac->mac_sc;
10114 bwn_psctl(mac, BWN_PS_AWAKE);
10118 bwn_phy_unlock(struct bwn_mac *mac)
10120 struct bwn_softc *sc = mac->mac_sc;
10127 bwn_psctl(mac, 0);
10131 bwn_rf_lock(struct bwn_mac *mac)
10134 BWN_WRITE_4(mac, BWN_MACCTL,
10135 BWN_READ_4(mac, BWN_MACCTL) | BWN_MACCTL_RADIO_LOCK);
10136 BWN_READ_4(mac, BWN_MACCTL);
10141 bwn_rf_unlock(struct bwn_mac *mac)
10144 BWN_READ_2(mac, BWN_PHYVER);
10145 BWN_WRITE_4(mac, BWN_MACCTL,
10146 BWN_READ_4(mac, BWN_MACCTL) & ~BWN_MACCTL_RADIO_LOCK);
10150 bwn_pio_parse_cookie(struct bwn_mac *mac, uint16_t cookie,
10153 struct bwn_pio *pio = &mac->mac_method.pio;
10189 struct bwn_mac *mac = arg;
10190 struct bwn_softc *sc = mac->mac_sc;
10193 if (mac && mac->mac_status >= BWN_MAC_STATUS_STARTED &&
10194 mac->mac_phy.set_txpwr != NULL)
10195 mac->mac_phy.set_txpwr(mac);
10200 bwn_task_15s(struct bwn_mac *mac)
10204 if (mac->mac_fw.opensource) {
10205 reg = bwn_shm_read_2(mac, BWN_SCRATCH, BWN_WATCHDOG_REG);
10207 bwn_restart(mac, "fw watchdog");
10210 bwn_shm_write_2(mac, BWN_SCRATCH, BWN_WATCHDOG_REG, 1);
10212 if (mac->mac_phy.task_15s)
10213 mac->mac_phy.task_15s(mac);
10215 mac->mac_phy.txerrors = BWN_TXERROR_MAX;
10219 bwn_task_30s(struct bwn_mac *mac)
10222 if (mac->mac_phy.type != BWN_PHYTYPE_G || mac->mac_noise.noi_running)
10224 mac->mac_noise.noi_running = 1;
10225 mac->mac_noise.noi_nsamples = 0;
10227 bwn_noise_gensample(mac);
10231 bwn_task_60s(struct bwn_mac *mac)
10234 if (mac->mac_phy.task_60s)
10235 mac->mac_phy.task_60s(mac);
10236 bwn_phy_txpower_check(mac, BWN_TXPWR_IGNORE_TIME);
10242 struct bwn_mac *mac = arg;
10243 struct bwn_softc *sc = mac->mac_sc;
10246 if (mac->mac_status != BWN_MAC_STATUS_STARTED)
10249 if (mac->mac_task_state % 4 == 0)
10250 bwn_task_60s(mac);
10251 if (mac->mac_task_state % 2 == 0)
10252 bwn_task_30s(mac);
10253 bwn_task_15s(mac);
10255 mac->mac_task_state++;
10256 callout_reset(&sc->sc_task_ch, hz * 15, bwn_tasks, mac);
10260 bwn_plcp_get_ofdmrate(struct bwn_mac *mac, struct bwn_plcp6 *plcp, uint8_t a)
10262 struct bwn_softc *sc = mac->mac_sc;
10290 bwn_plcp_get_cckrate(struct bwn_mac *mac, struct bwn_plcp6 *plcp)
10292 struct bwn_softc *sc = mac->mac_sc;
10309 bwn_rx_radiotap(struct bwn_mac *mac, struct mbuf *m,
10313 struct bwn_softc *sc = mac->mac_sc;
10325 bwn_tsf_read(mac, &tsf);
10339 bwn_tsf_read(struct bwn_mac *mac, uint64_t *tsf)
10343 KASSERT(siba_get_revid(mac->mac_sc->sc_dev) >= 3,
10346 low = BWN_READ_4(mac, BWN_REV3PLUS_TSF_LOW);
10347 high = BWN_READ_4(mac, BWN_REV3PLUS_TSF_HIGH);
10354 bwn_dma_attach(struct bwn_mac *mac)
10356 struct bwn_dma *dma = &mac->mac_method.dma;
10357 struct bwn_softc *sc = mac->mac_sc;
10366 mac->mac_flags |= BWN_MAC_FLAG_DMA;
10368 dma->dmatype = bwn_dma_gettype(mac);
10431 dma->wme[WME_AC_BK] = bwn_dma_ringsetup(mac, 0, 1, dma->dmatype);
10435 dma->wme[WME_AC_BE] = bwn_dma_ringsetup(mac, 1, 1, dma->dmatype);
10439 dma->wme[WME_AC_VI] = bwn_dma_ringsetup(mac, 2, 1, dma->dmatype);
10443 dma->wme[WME_AC_VO] = bwn_dma_ringsetup(mac, 3, 1, dma->dmatype);
10447 dma->mcast = bwn_dma_ringsetup(mac, 4, 1, dma->dmatype);
10450 dma->rx = bwn_dma_ringsetup(mac, 0, 0, dma->dmatype);
10468 bwn_dma_parse_cookie(struct bwn_mac *mac, const struct bwn_txstatus *status,
10471 struct bwn_dma *dma = &mac->mac_method.dma;
10473 struct bwn_softc *sc = mac->mac_sc;
10475 BWN_ASSERT_LOCKED(mac->mac_sc);
10517 bwn_dma_stop(struct bwn_mac *mac)
10521 if ((mac->mac_flags & BWN_MAC_FLAG_DMA) == 0)
10523 dma = &mac->mac_method.dma;
10544 bwn_pio_stop(struct bwn_mac *mac)
10548 if (mac->mac_flags & BWN_MAC_FLAG_DMA)
10550 pio = &mac->mac_method.pio;
10560 bwn_led_attach(struct bwn_mac *mac)
10562 struct bwn_softc *sc = mac->mac_sc;
10634 bwn_led_newstate(struct bwn_mac *mac, enum ieee80211_state nstate)
10636 struct bwn_softc *sc = mac->mac_sc;
10650 val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
10692 BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
10696 bwn_led_event(struct bwn_mac *mac, int event)
10698 struct bwn_softc *sc = mac->mac_sc;
10727 bwn_led_blink_start(mac, bwn_led_duration[rate].on_dur,
10732 bwn_led_blink_start(struct bwn_mac *mac, int on_dur, int off_dur)
10734 struct bwn_softc *sc = mac->mac_sc;
10738 val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
10740 BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
10750 callout_reset(&sc->sc_led_blink_ch, on_dur, bwn_led_blink_next, mac);
10756 struct bwn_mac *mac = arg;
10757 struct bwn_softc *sc = mac->mac_sc;
10760 val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
10762 BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
10765 bwn_led_blink_end, mac);
10771 struct bwn_mac *mac = arg;
10772 struct bwn_softc *sc = mac->mac_sc;
10801 struct bwn_mac *mac = sc->sc_curmac;
10804 KASSERT(mac->mac_status >= BWN_MAC_STATUS_STARTED,
10805 ("%s: invalid MAC status %d", __func__, mac->mac_status));
10807 if (mac->mac_phy.rf_rev >= 3 || mac->mac_phy.type == BWN_PHYTYPE_LP) {
10808 if (!(BWN_READ_4(mac, BWN_RF_HWENABLED_HI)
10812 if (BWN_READ_2(mac, BWN_RF_HWENABLED_LO)
10817 if (mac->mac_flags & BWN_MAC_FLAG_RADIO_ON)
10822 mac->mac_flags |= BWN_MAC_FLAG_RADIO_ON;
10824 mac->mac_flags &= ~BWN_MAC_FLAG_RADIO_ON;
10829 if (cur != mac->mac_phy.rf_on) {
10831 bwn_rf_turnon(mac);
10833 bwn_rf_turnoff(mac);
10841 bwn_phy_lp_init_pre(struct bwn_mac *mac)
10843 struct bwn_phy *phy = &mac->mac_phy;
10850 bwn_phy_lp_init(struct bwn_mac *mac)
10869 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
10870 struct bwn_softc *sc = mac->mac_sc;
10877 bwn_phy_lp_readsprom(mac); /* XXX bad place */
10878 bwn_phy_lp_bbinit(mac);
10881 BWN_PHY_SET(mac, BWN_PHY_4WIRECTL, 0x2);
10883 BWN_PHY_MASK(mac, BWN_PHY_4WIRECTL, 0xfffd);
10886 if (mac->mac_phy.rf_ver == 0x2062)
10887 bwn_phy_lp_b2062_init(mac);
10889 bwn_phy_lp_b2063_init(mac);
10894 tmp = BWN_RF_READ(mac, st->st_rfaddr);
10897 BWN_PHY_SETMASK(mac,
10902 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xf0), 0x5f80);
10903 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xf1), 0);
10907 if (mac->mac_phy.rev >= 2)
10908 bwn_phy_lp_rxcal_r2(mac);
10911 bwn_phy_lp_rccal_r12(mac);
10913 bwn_phy_lp_set_rccap(mac);
10915 error = bwn_phy_lp_switch_channel(mac, 7);
10919 bwn_phy_lp_txpctl_init(mac);
10920 bwn_phy_lp_calib(mac);
10925 bwn_phy_lp_read(struct bwn_mac *mac, uint16_t reg)
10928 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
10929 return (BWN_READ_2(mac, BWN_PHYDATA));
10933 bwn_phy_lp_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
10936 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
10937 BWN_WRITE_2(mac, BWN_PHYDATA, value);
10941 bwn_phy_lp_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask,
10945 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
10946 BWN_WRITE_2(mac, BWN_PHYDATA,
10947 (BWN_READ_2(mac, BWN_PHYDATA) & mask) | set);
10951 bwn_phy_lp_rf_read(struct bwn_mac *mac, uint16_t reg)
10955 if (mac->mac_phy.rev < 2 && reg != 0x4001)
10957 if (mac->mac_phy.rev >= 2)
10959 BWN_WRITE_2(mac, BWN_RFCTL, reg);
10960 return BWN_READ_2(mac, BWN_RFDATALO);
10964 bwn_phy_lp_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
10968 BWN_WRITE_2(mac, BWN_RFCTL, reg);
10969 BWN_WRITE_2(mac, BWN_RFDATALO, value);
10973 bwn_phy_lp_rf_onoff(struct bwn_mac *mac, int on)
10977 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xe0ff);
10978 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2,
10979 (mac->mac_phy.rev >= 2) ? 0xf7f7 : 0xffe7);
10983 if (mac->mac_phy.rev >= 2) {
10984 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x83ff);
10985 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1f00);
10986 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0x80ff);
10987 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xdfff);
10988 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x0808);
10992 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xe0ff);
10993 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1f00);
10994 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfcff);
10995 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x0018);
10999 bwn_phy_lp_switch_channel(struct bwn_mac *mac, uint32_t chan)
11001 struct bwn_phy *phy = &mac->mac_phy;
11006 error = bwn_phy_lp_b2063_switch_channel(mac, chan);
11010 error = bwn_phy_lp_b2062_switch_channel(mac, chan);
11013 bwn_phy_lp_set_anafilter(mac, chan);
11014 bwn_phy_lp_set_gaintbl(mac, ieee80211_ieee2mhz(chan, 0));
11018 BWN_WRITE_2(mac, BWN_CHANNEL, chan);
11023 bwn_phy_lp_get_default_chan(struct bwn_mac *mac)
11025 struct bwn_softc *sc = mac->mac_sc;
11033 bwn_phy_lp_set_antenna(struct bwn_mac *mac, int antenna)
11035 struct bwn_phy *phy = &mac->mac_phy;
11041 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_UCODE_ANTDIV_HELPER);
11042 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfffd, antenna & 0x2);
11043 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfffe, antenna & 0x1);
11044 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_UCODE_ANTDIV_HELPER);
11049 bwn_phy_lp_task_60s(struct bwn_mac *mac)
11052 bwn_phy_lp_calib(mac);
11056 bwn_phy_lp_readsprom(struct bwn_mac *mac)
11058 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11059 struct bwn_softc *sc = mac->mac_sc;
11084 bwn_phy_lp_bbinit(struct bwn_mac *mac)
11087 bwn_phy_lp_tblinit(mac);
11088 if (mac->mac_phy.rev >= 2)
11089 bwn_phy_lp_bbinit_r2(mac);
11091 bwn_phy_lp_bbinit_r01(mac);
11095 bwn_phy_lp_txpctl_init(struct bwn_mac *mac)
11099 struct bwn_softc *sc = mac->mac_sc;
11103 bwn_phy_lp_set_txgain(mac,
11105 bwn_phy_lp_set_bbmult(mac, 150);
11109 bwn_phy_lp_calib(struct bwn_mac *mac)
11111 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11112 struct bwn_softc *sc = mac->mac_sc;
11125 bwn_mac_suspend(mac);
11128 BWN_WRITE_2(mac, BWN_BTCOEX_CTL, 0x3);
11129 BWN_WRITE_2(mac, BWN_BTCOEX_TXCTL, 0xff);
11131 if (mac->mac_phy.rev >= 2)
11132 bwn_phy_lp_digflt_save(mac);
11133 bwn_phy_lp_get_txpctlmode(mac);
11135 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
11136 if (mac->mac_phy.rev == 0 && mode != BWN_PHYLP_TXPCTL_OFF)
11137 bwn_phy_lp_bugfix(mac);
11138 if (mac->mac_phy.rev >= 2 && fc == 1) {
11139 bwn_phy_lp_get_txpctlmode(mac);
11141 oafeovr = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR) & 0x40;
11143 ogain = bwn_phy_lp_get_txgain(mac);
11144 orf = BWN_PHY_READ(mac, BWN_PHY_RF_PWR_OVERRIDE) & 0xff;
11145 obbmult = bwn_phy_lp_get_bbmult(mac);
11146 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
11148 bwn_phy_lp_set_txgain(mac, &ogain);
11149 bwn_phy_lp_set_bbmult(mac, obbmult);
11150 bwn_phy_lp_set_txpctlmode(mac, omode);
11151 BWN_PHY_SETMASK(mac, BWN_PHY_RF_PWR_OVERRIDE, 0xff00, orf);
11153 bwn_phy_lp_set_txpctlmode(mac, mode);
11154 if (mac->mac_phy.rev >= 2)
11155 bwn_phy_lp_digflt_restore(mac);
11163 } else if (mac->mac_phy.rev >= 2)
11174 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, rc->rc_c1);
11175 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff, rc->rc_c0 << 8);
11177 bwn_phy_lp_set_trsw_over(mac, 1 /* TX */, 0 /* RX */);
11180 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
11181 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfff7, 0);
11183 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x20);
11184 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffdf, 0);
11187 bwn_phy_lp_set_rxgain(mac, 0x2d5d);
11188 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfffe);
11189 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xfffe);
11190 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x800);
11191 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x800);
11192 bwn_phy_lp_set_deaf(mac, 0);
11194 (void)bwn_phy_lp_calc_rx_iq_comp(mac, 0xfff0);
11195 bwn_phy_lp_clear_deaf(mac, 0);
11196 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfffc);
11197 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfff7);
11198 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffdf);
11201 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfffe);
11202 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffef);
11203 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffbf);
11204 if (mac->mac_phy.rev >= 2) {
11205 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfeff);
11207 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfbff);
11208 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xe5), 0xfff7);
11211 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfdff);
11214 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfffe);
11215 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xf7ff);
11217 bwn_mac_enable(mac);
11221 bwn_phy_lp_switch_analog(struct bwn_mac *mac, int on)
11225 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfff8);
11229 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVRVAL, 0x0007);
11230 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 0x0007);
11234 bwn_phy_lp_b2063_switch_channel(struct bwn_mac *mac, uint8_t chan)
11237 struct bwn_softc *sc = mac->mac_sc;
11252 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_VCOBUF1, bc->bc_data[0]);
11253 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_MIXER2, bc->bc_data[1]);
11254 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_BUF2, bc->bc_data[2]);
11255 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_RCCR1, bc->bc_data[3]);
11256 BWN_RF_WRITE(mac, BWN_B2063_A_RX_1ST3, bc->bc_data[4]);
11257 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND1, bc->bc_data[5]);
11258 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND4, bc->bc_data[6]);
11259 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND7, bc->bc_data[7]);
11260 BWN_RF_WRITE(mac, BWN_B2063_A_RX_PS6, bc->bc_data[8]);
11261 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_CTL2, bc->bc_data[9]);
11262 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_CTL5, bc->bc_data[10]);
11263 BWN_RF_WRITE(mac, BWN_B2063_PA_CTL11, bc->bc_data[11]);
11265 old = BWN_RF_READ(mac, BWN_B2063_COM15);
11266 BWN_RF_SET(mac, BWN_B2063_COM15, 0x1e);
11276 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB3, 0x2);
11277 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB6,
11279 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB7,
11281 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB5, timeoutref);
11289 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB7,
11291 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB8, count & 0xff);
11299 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG1, 0xffe0, tmp[0] >> 4);
11300 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG2, 0xfe0f, tmp[0] << 4);
11301 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG2, 0xfff0, tmp[0] >> 16);
11302 BWN_RF_WRITE(mac, BWN_B2063_JTAG_SG3, (tmp[1] >> 8) & 0xff);
11303 BWN_RF_WRITE(mac, BWN_B2063_JTAG_SG4, tmp[1] & 0xff);
11305 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF1, 0xb9);
11306 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF2, 0x88);
11307 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF3, 0x28);
11308 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF4, 0x63);
11320 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP2, 0xffc0, tmp[4]);
11321 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP2, 0xffbf, scale << 6);
11328 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP3, 0xffe0, tmp[5]);
11329 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP3, 0xffdf, scale << 5);
11331 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_XTAL_12, 0xfffb, 0x4);
11333 BWN_RF_SET(mac, BWN_B2063_JTAG_XTAL_12, 0x2);
11335 BWN_RF_MASK(mac, BWN_B2063_JTAG_XTAL_12, 0xfd);
11338 BWN_RF_SET(mac, BWN_B2063_JTAG_VCO1, 0x2);
11340 BWN_RF_MASK(mac, BWN_B2063_JTAG_VCO1, 0xfd);
11342 BWN_RF_SET(mac, BWN_B2063_PLL_SP2, 0x3);
11344 BWN_RF_MASK(mac, BWN_B2063_PLL_SP2, 0xfffc);
11347 BWN_RF_MASK(mac, BWN_B2063_PLL_SP1, ~0x40);
11348 tmp16 = BWN_RF_READ(mac, BWN_B2063_JTAG_CALNRST) & 0xf8;
11349 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16);
11351 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x4);
11353 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x6);
11355 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x7);
11357 BWN_RF_SET(mac, BWN_B2063_PLL_SP1, 0x40);
11359 BWN_RF_WRITE(mac, BWN_B2063_COM15, old);
11364 bwn_phy_lp_b2062_switch_channel(struct bwn_mac *mac, uint8_t chan)
11366 struct bwn_softc *sc = mac->mac_sc;
11367 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11383 BWN_RF_SET(mac, BWN_B2062_S_RFPLLCTL14, 0x04);
11384 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE0, bc->bc_data[0]);
11385 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE2, bc->bc_data[1]);
11386 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE3, bc->bc_data[2]);
11387 BWN_RF_WRITE(mac, BWN_B2062_N_TX_TUNE, bc->bc_data[3]);
11388 BWN_RF_WRITE(mac, BWN_B2062_S_LGENG_CTL1, bc->bc_data[4]);
11389 BWN_RF_WRITE(mac, BWN_B2062_N_LGENACTL5, bc->bc_data[5]);
11390 BWN_RF_WRITE(mac, BWN_B2062_N_LGENACTL6, bc->bc_data[6]);
11391 BWN_RF_WRITE(mac, BWN_B2062_N_TX_PGA, bc->bc_data[7]);
11392 BWN_RF_WRITE(mac, BWN_B2062_N_TX_PAD, bc->bc_data[8]);
11394 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL33, 0xcc);
11395 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL34, 0x07);
11396 bwn_phy_lp_b2062_reset_pllbias(mac);
11405 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL26, tmp[5]);
11409 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL27, tmp[5]);
11413 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL28, tmp[5]);
11417 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL29,
11419 tmp[7] = BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL19);
11421 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL23, (tmp[8] >> 8) + 16);
11422 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL24, tmp[8] & 0xff);
11424 bwn_phy_lp_b2062_vco_calib(mac);
11425 if (BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL3) & 0x10) {
11426 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL33, 0xfc);
11427 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL34, 0);
11428 bwn_phy_lp_b2062_reset_pllbias(mac);
11429 bwn_phy_lp_b2062_vco_calib(mac);
11430 if (BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL3) & 0x10) {
11431 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL14, ~0x04);
11435 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL14, ~0x04);
11440 bwn_phy_lp_set_anafilter(struct bwn_mac *mac, uint8_t channel)
11442 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11445 if (mac->mac_phy.rev < 2) {
11446 BWN_PHY_SETMASK(mac, BWN_PHY_LP_PHY_CTL, 0xfcff, tmp << 9);
11447 if ((mac->mac_phy.rev == 1) && (plp->plp_rccap))
11448 bwn_phy_lp_set_rccap(mac);
11452 BWN_RF_WRITE(mac, BWN_B2063_TX_BB_SP3, 0x3f);
11456 bwn_phy_lp_set_gaintbl(struct bwn_mac *mac, uint32_t freq)
11458 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11459 struct bwn_softc *sc = mac->mac_sc;
11464 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
11479 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), 3, tmp);
11480 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), 3, tmp);
11484 bwn_phy_lp_digflt_save(struct bwn_mac *mac)
11486 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11502 plp->plp_digfilt[i] = BWN_PHY_READ(mac, addr[i]);
11503 BWN_PHY_WRITE(mac, addr[i], val[i]);
11508 bwn_phy_lp_get_txpctlmode(struct bwn_mac *mac)
11510 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11511 struct bwn_softc *sc = mac->mac_sc;
11514 ctl = BWN_PHY_READ(mac, BWN_PHY_TX_PWR_CTL_CMD);
11533 bwn_phy_lp_set_txpctlmode(struct bwn_mac *mac, uint8_t mode)
11535 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11539 bwn_phy_lp_get_txpctlmode(mac);
11546 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_CMD, 0xff80,
11548 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_NNUM,
11552 if (mac->mac_phy.rev < 2)
11553 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfeff);
11555 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xff7f);
11556 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xbfff);
11558 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xffbf);
11562 if (mac->mac_phy.rev >= 2) {
11564 BWN_PHY_SET(mac, BWN_PHY_OFDM(0xd0), 0x2);
11566 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xd0), 0xfffd);
11584 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_CMD,
11589 bwn_phy_lp_bugfix(struct bwn_mac *mac)
11591 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11592 struct bwn_softc *sc = mac->mac_sc;
11607 bwn_phy_lp_get_txpctlmode(mac);
11613 bwn_tab_read_multi(mac,
11614 (mac->mac_phy.rev < 2) ? BWN_TAB_4(10, 0x140) :
11617 bwn_phy_lp_tblinit(mac);
11618 bwn_phy_lp_bbinit(mac);
11619 bwn_phy_lp_txpctl_init(mac);
11620 bwn_phy_lp_rf_onoff(mac, 1);
11621 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
11623 bwn_tab_write_multi(mac,
11624 (mac->mac_phy.rev < 2) ? BWN_TAB_4(10, 0x140) :
11627 BWN_WRITE_2(mac, BWN_CHANNEL, plp->plp_chan);
11630 bwn_phy_lp_set_anafilter(mac, plp->plp_chan);
11634 bwn_phy_lp_get_txpctlmode(mac);
11636 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_ON_SW);
11637 if (mac->mac_phy.rev >= 2) {
11638 rxcomp = bwn_tab_read(mac,
11640 txgain = bwn_tab_read(mac,
11646 bwn_phy_lp_set_txgain(mac, &tg);
11648 rxcomp = bwn_tab_read(mac,
11650 txgain = bwn_tab_read(mac,
11652 BWN_PHY_SETMASK(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL,
11654 bwn_phy_lp_set_txgain_dac(mac, txgain & 0x7);
11655 bwn_phy_lp_set_txgain_pa(mac, (txgain >> 24) & 0x7f);
11657 bwn_phy_lp_set_bbmult(mac, (rxcomp >> 20) & 0xff);
11662 bwn_tab_write_multi(mac, BWN_TAB_2(0, 80), 2, value);
11664 coeff = bwn_tab_read(mac,
11665 (mac->mac_phy.rev >= 2) ? BWN_TAB_4(7, txpwridx + 448) :
11667 bwn_tab_write(mac, BWN_TAB_2(0, 85), coeff & 0xffff);
11668 if (mac->mac_phy.rev >= 2) {
11669 rfpwr = bwn_tab_read(mac,
11671 BWN_PHY_SETMASK(mac, BWN_PHY_RF_PWR_OVERRIDE, 0xff00,
11674 bwn_phy_lp_set_txgain_override(mac);
11677 bwn_phy_lp_set_rccap(mac);
11678 bwn_phy_lp_set_antenna(mac, plp->plp_antenna);
11679 bwn_phy_lp_set_txpctlmode(mac, mode);
11684 bwn_phy_lp_digflt_restore(struct bwn_mac *mac)
11686 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11697 BWN_PHY_WRITE(mac, addr[i], plp->plp_digfilt[i]);
11701 bwn_phy_lp_tblinit(struct bwn_mac *mac)
11703 uint32_t freq = ieee80211_ieee2mhz(bwn_phy_lp_get_default_chan(mac), 0);
11705 if (mac->mac_phy.rev < 2) {
11706 bwn_phy_lp_tblinit_r01(mac);
11707 bwn_phy_lp_tblinit_txgain(mac);
11708 bwn_phy_lp_set_gaintbl(mac, freq);
11712 bwn_phy_lp_tblinit_r2(mac);
11713 bwn_phy_lp_tblinit_txgain(mac);
11728 bwn_phy_lp_bbinit_r2(struct bwn_mac *mac)
11730 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11731 struct bwn_softc *sc = mac->mac_sc;
11767 BWN_PHY_WRITE(mac, v1[i].reg, v1[i].value);
11768 BWN_PHY_SET(mac, BWN_PHY_ADC_COMPENSATION_CTL, 0x10);
11770 BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask, v2[i].set);
11772 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x4000);
11773 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x2000);
11774 BWN_PHY_SET(mac, BWN_PHY_OFDM(0x10a), 0x1);
11776 bwn_tab_write(mac, BWN_TAB_4(17, 65), 0xec);
11777 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x10a), 0xff01, 0x14);
11779 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x10a), 0xff01, 0x10);
11781 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xdf), 0xff00, 0xf4);
11782 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xdf), 0x00ff, 0xf100);
11783 BWN_PHY_WRITE(mac, BWN_PHY_CLIPTHRESH, 0x48);
11784 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0xff00, 0x46);
11785 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xe4), 0xff00, 0x10);
11786 BWN_PHY_SETMASK(mac, BWN_PHY_PWR_THRESH1, 0xfff0, 0x9);
11787 BWN_PHY_MASK(mac, BWN_PHY_GAINDIRECTMISMATCH, ~0xf);
11788 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0x00ff, 0x5500);
11789 BWN_PHY_SETMASK(mac, BWN_PHY_CLIPCTRTHRESH, 0xfc1f, 0xa0);
11790 BWN_PHY_SETMASK(mac, BWN_PHY_GAINDIRECTMISMATCH, 0xe0ff, 0x300);
11791 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0x00ff, 0x2a00);
11794 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x2100);
11795 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0xa);
11797 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x1e00);
11798 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0xd);
11801 BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask, v3[i].set);
11804 bwn_tab_write(mac, BWN_TAB_2(0x08, 0x14), 0);
11805 bwn_tab_write(mac, BWN_TAB_2(0x08, 0x12), 0x40);
11809 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x40);
11810 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xf0ff, 0xb00);
11811 BWN_PHY_SETMASK(mac, BWN_PHY_SYNCPEAKCNT, 0xfff8, 0x6);
11812 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0x00ff, 0x9d00);
11813 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0xff00, 0xa1);
11814 BWN_PHY_MASK(mac, BWN_PHY_IDLEAFTERPKTRXTO, 0x00ff);
11816 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x40);
11818 BWN_PHY_SETMASK(mac, BWN_PHY_CRS_ED_THRESH, 0xff00, 0xb3);
11819 BWN_PHY_SETMASK(mac, BWN_PHY_CRS_ED_THRESH, 0x00ff, 0xad00);
11820 BWN_PHY_SETMASK(mac, BWN_PHY_INPUT_PWRDB, 0xff00, plp->plp_rxpwroffset);
11821 BWN_PHY_SET(mac, BWN_PHY_RESET_CTL, 0x44);
11822 BWN_PHY_WRITE(mac, BWN_PHY_RESET_CTL, 0x80);
11823 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_0, 0xa954);
11824 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_1,
11830 BWN_PHY_SET(mac, BWN_PHY_AFE_ADC_CTL_0, 0x1c);
11831 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_CTL, 0x00ff, 0x8800);
11832 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_ADC_CTL_1, 0xfc3c, 0x0400);
11835 bwn_phy_lp_digflt_save(mac);
11839 bwn_phy_lp_bbinit_r01(struct bwn_mac *mac)
11841 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
11842 struct bwn_softc *sc = mac->mac_sc;
11905 BWN_PHY_MASK(mac, BWN_PHY_AFE_DAC_CTL, 0xf7ff);
11906 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL, 0);
11907 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVR, 0);
11908 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_0, 0);
11909 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, 0);
11910 BWN_PHY_SET(mac, BWN_PHY_AFE_DAC_CTL, 0x0004);
11911 BWN_PHY_SETMASK(mac, BWN_PHY_OFDMSYNCTHRESH0, 0xff00, 0x0078);
11912 BWN_PHY_SETMASK(mac, BWN_PHY_CLIPCTRTHRESH, 0x83ff, 0x5800);
11913 BWN_PHY_WRITE(mac, BWN_PHY_ADC_COMPENSATION_CTL, 0x0016);
11914 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_ADC_CTL_0, 0xfff8, 0x0004);
11915 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0x00ff, 0x5400);
11916 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0x00ff, 0x2400);
11917 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x2100);
11918 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0x0006);
11919 BWN_PHY_MASK(mac, BWN_PHY_RX_RADIO_CTL, 0xfffe);
11921 BWN_PHY_SETMASK(mac, v1[i].offset, v1[i].mask, v1[i].set);
11922 BWN_PHY_SETMASK(mac, BWN_PHY_INPUT_PWRDB,
11929 if (mac->mac_phy.rev == 0)
11930 BWN_PHY_SETMASK(mac, BWN_PHY_LP_RF_SIGNAL_LUT,
11932 bwn_tab_write(mac, BWN_TAB_2(11, 7), 60);
11935 BWN_PHY_SETMASK(mac, BWN_PHY_LP_RF_SIGNAL_LUT, 0xffcf, 0x0020);
11936 bwn_tab_write(mac, BWN_TAB_2(11, 7), 100);
11939 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_0, tmp);
11941 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_RSSI_CTL_1, 0xf000, 0x0aaa);
11943 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_RSSI_CTL_1, 0xf000, 0x02aa);
11944 bwn_tab_write(mac, BWN_TAB_2(11, 1), 24);
11945 BWN_PHY_SETMASK(mac, BWN_PHY_RX_RADIO_CTL,
11947 if (mac->mac_phy.rev == 1 &&
11950 BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask,
11954 ((mac->mac_phy.rev == 0) &&
11957 BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask,
11959 } else if (mac->mac_phy.rev == 1 ||
11962 BWN_PHY_SETMASK(mac, v4[i].offset, v4[i].mask,
11966 BWN_PHY_SETMASK(mac, v5[i].offset, v5[i].mask,
11969 if (mac->mac_phy.rev == 1 &&
11971 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_5, BWN_PHY_TR_LOOKUP_1);
11972 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_6, BWN_PHY_TR_LOOKUP_2);
11973 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_7, BWN_PHY_TR_LOOKUP_3);
11974 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_8, BWN_PHY_TR_LOOKUP_4);
11979 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x0006);
11980 BWN_PHY_WRITE(mac, BWN_PHY_GPIO_SELECT, 0x0005);
11981 BWN_PHY_WRITE(mac, BWN_PHY_GPIO_OUTEN, 0xffff);
11982 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_PR45960W);
11985 BWN_PHY_SET(mac, BWN_PHY_LP_PHY_CTL, 0x8000);
11986 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x0040);
11987 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0x00ff, 0xa400);
11988 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xf0ff, 0x0b00);
11989 BWN_PHY_SETMASK(mac, BWN_PHY_SYNCPEAKCNT, 0xfff8, 0x0007);
11990 BWN_PHY_SETMASK(mac, BWN_PHY_DSSS_CONFIRM_CNT, 0xfff8, 0x0003);
11991 BWN_PHY_SETMASK(mac, BWN_PHY_DSSS_CONFIRM_CNT, 0xffc7, 0x0020);
11992 BWN_PHY_MASK(mac, BWN_PHY_IDLEAFTERPKTRXTO, 0x00ff);
11994 BWN_PHY_MASK(mac, BWN_PHY_LP_PHY_CTL, 0x7fff);
11995 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, 0xffbf);
11997 if (mac->mac_phy.rev == 1) {
11998 tmp = BWN_PHY_READ(mac, BWN_PHY_CLIPCTRTHRESH);
12001 BWN_PHY_WRITE(mac, BWN_PHY_4C3, tmp2);
12002 tmp = BWN_PHY_READ(mac, BWN_PHY_GAINDIRECTMISMATCH);
12005 BWN_PHY_WRITE(mac, BWN_PHY_4C4, tmp2);
12006 tmp = BWN_PHY_READ(mac, BWN_PHY_VERYLOWGAINDB);
12009 BWN_PHY_WRITE(mac, BWN_PHY_4C5, tmp2);
12019 bwn_phy_lp_b2062_init(struct bwn_mac *mac)
12027 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
12028 struct bwn_softc *sc = mac->mac_sc;
12053 bwn_phy_lp_b2062_tblinit(mac);
12056 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
12057 if (mac->mac_phy.rev > 0)
12058 BWN_RF_WRITE(mac, BWN_B2062_S_BG_CTL1,
12059 (BWN_RF_READ(mac, BWN_B2062_N_COM2) >> 1) | 0x80);
12061 BWN_RF_SET(mac, BWN_B2062_N_TSSI_CTL0, 0x1);
12063 BWN_RF_MASK(mac, BWN_B2062_N_TSSI_CTL0, ~0x1);
12072 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL1, 0xfffb);
12075 BWN_RF_SET(mac, BWN_B2062_S_RFPLLCTL1, 0x4);
12078 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL7,
12080 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL18,
12082 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL19,
12095 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL8,
12097 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL9,
12099 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL10, f->value[4]);
12100 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL11, f->value[5]);
12107 bwn_phy_lp_b2063_init(struct bwn_mac *mac)
12110 bwn_phy_lp_b2063_tblinit(mac);
12111 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_SP5, 0);
12112 BWN_RF_SET(mac, BWN_B2063_COM8, 0x38);
12113 BWN_RF_WRITE(mac, BWN_B2063_REG_SP1, 0x56);
12114 BWN_RF_MASK(mac, BWN_B2063_RX_BB_CTL2, ~0x2);
12115 BWN_RF_WRITE(mac, BWN_B2063_PA_SP7, 0);
12116 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_SP6, 0x20);
12117 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_SP9, 0x40);
12118 if (mac->mac_phy.rev == 2) {
12119 BWN_RF_WRITE(mac, BWN_B2063_PA_SP3, 0xa0);
12120 BWN_RF_WRITE(mac, BWN_B2063_PA_SP4, 0xa0);
12121 BWN_RF_WRITE(mac, BWN_B2063_PA_SP2, 0x18);
12123 BWN_RF_WRITE(mac, BWN_B2063_PA_SP3, 0x20);
12124 BWN_RF_WRITE(mac, BWN_B2063_PA_SP2, 0x20);
12129 bwn_phy_lp_rxcal_r2(struct bwn_mac *mac)
12131 struct bwn_softc *sc = mac->mac_sc;
12153 tmp = BWN_RF_READ(mac, BWN_B2063_RX_BB_SP8) & 0xff;
12156 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
12157 BWN_RF_MASK(mac, BWN_B2063_PLL_SP1, 0xf7);
12159 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
12161 if (BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2)
12166 if (!(BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2))
12167 BWN_RF_WRITE(mac, BWN_B2063_RX_BB_SP8, tmp);
12169 tmp = BWN_RF_READ(mac, BWN_B2063_TX_BB_SP3) & 0xff;
12172 BWN_RF_WRITE(mac, v2[i].reg, v2[i].value);
12174 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL4, 0xfc);
12175 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL5, 0x0);
12177 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL4, 0x13);
12178 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL5, 0x1);
12180 BWN_RF_WRITE(mac, BWN_B2063_PA_SP7, 0x7d);
12182 if (BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2)
12186 if (!(BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2))
12187 BWN_RF_WRITE(mac, BWN_B2063_TX_BB_SP3, tmp);
12188 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL1, 0x7e);
12192 bwn_phy_lp_rccal_r12(struct bwn_mac *mac)
12194 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
12195 struct bwn_softc *sc = mac->mac_sc;
12209 error = bwn_phy_lp_switch_channel(mac, 7);
12213 txo = (BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR) & 0x40) ? 1 : 0;
12214 bbmult = bwn_phy_lp_get_bbmult(mac);
12216 tx_gains = bwn_phy_lp_get_txgain(mac);
12218 save[0] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_0);
12219 save[1] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_VAL_0);
12220 save[2] = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR);
12221 save[3] = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVRVAL);
12222 save[4] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_2);
12223 save[5] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_2_VAL);
12224 save[6] = BWN_PHY_READ(mac, BWN_PHY_LP_PHY_CTL);
12226 bwn_phy_lp_get_txpctlmode(mac);
12228 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
12231 bwn_phy_lp_set_deaf(mac, 1);
12232 bwn_phy_lp_set_trsw_over(mac, 0, 1);
12233 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffb);
12234 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x4);
12235 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfff7);
12236 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
12237 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x10);
12238 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x10);
12239 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffdf);
12240 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x20);
12241 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffbf);
12242 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x40);
12243 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x7);
12244 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x38);
12245 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xff3f);
12246 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x100);
12247 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfdff);
12248 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL0, 0);
12249 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL1, 1);
12250 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL2, 0x20);
12251 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfbff);
12252 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xf7ff);
12253 BWN_PHY_WRITE(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL, 0);
12254 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, 0x45af);
12255 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, 0x3ff);
12257 loopback = bwn_phy_lp_loopback(mac);
12260 bwn_phy_lp_set_rxgain_idx(mac, loopback);
12261 BWN_PHY_SETMASK(mac, BWN_PHY_LP_PHY_CTL, 0xffbf, 0x40);
12262 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfff8, 0x1);
12263 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xffc7, 0x8);
12264 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xff3f, 0xc0);
12269 BWN_RF_WRITE(mac, BWN_B2062_N_RXBB_CALIB2, i);
12272 bwn_phy_lp_ddfs_turnon(mac, 1, 1, j, j, 0);
12273 if (!(bwn_phy_lp_rx_iq_est(mac, 1000, 32, &ie)))
12286 bwn_phy_lp_ddfs_turnoff(mac);
12289 bwn_phy_lp_clear_deaf(mac, 1);
12290 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xff80);
12291 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfc00);
12293 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_VAL_0, save[1]);
12294 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_0, save[0]);
12295 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVRVAL, save[3]);
12296 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVR, save[2]);
12297 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2_VAL, save[5]);
12298 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, save[4]);
12299 BWN_PHY_WRITE(mac, BWN_PHY_LP_PHY_CTL, save[6]);
12301 bwn_phy_lp_set_bbmult(mac, bbmult);
12303 bwn_phy_lp_set_txgain(mac, &tx_gains);
12304 bwn_phy_lp_set_txpctlmode(mac, txpctlmode);
12306 bwn_phy_lp_set_rccap(mac);
12310 bwn_phy_lp_set_rccap(struct bwn_mac *mac)
12312 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
12315 if (mac->mac_phy.rev == 1)
12318 BWN_RF_WRITE(mac, BWN_B2062_N_RXBB_CALIB2,
12320 BWN_RF_WRITE(mac, BWN_B2062_N_TXCTL_A, rc_cap | 0x80);
12321 BWN_RF_WRITE(mac, BWN_B2062_S_RXG_CNT16,
12346 bwn_phy_lp_b2062_reset_pllbias(struct bwn_mac *mac)
12348 struct bwn_softc *sc = mac->mac_sc;
12350 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 0xff);
12353 BWN_RF_WRITE(mac, BWN_B2062_N_COM1, 4);
12354 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 4);
12356 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 0);
12362 bwn_phy_lp_b2062_vco_calib(struct bwn_mac *mac)
12365 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL21, 0x42);
12366 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL21, 0x62);
12371 bwn_phy_lp_b2062_tblinit(struct bwn_mac *mac)
12375 struct bwn_softc *sc = mac->mac_sc;
12434 BWN_RF_WRITE(mac, br->br_offset, br->br_valueg);
12437 BWN_RF_WRITE(mac, br->br_offset, br->br_valuea);
12445 bwn_phy_lp_b2063_tblinit(struct bwn_mac *mac)
12449 struct bwn_softc *sc = mac->mac_sc;
12503 BWN_RF_WRITE(mac, br->br_offset, br->br_valueg);
12506 BWN_RF_WRITE(mac, br->br_offset, br->br_valuea);
12514 bwn_tab_read_multi(struct bwn_mac *mac, uint32_t typenoffset,
12525 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
12530 *data = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;
12534 *((uint16_t *)data) = BWN_PHY_READ(mac,
12539 *((uint32_t *)data) = BWN_PHY_READ(mac,
12542 *((uint32_t *)data) |= BWN_PHY_READ(mac,
12553 bwn_tab_write_multi(struct bwn_mac *mac, uint32_t typenoffset,
12564 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
12573 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
12580 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
12585 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);
12586 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
12595 bwn_phy_lp_get_txgain(struct bwn_mac *mac)
12600 tg.tg_dac = (BWN_PHY_READ(mac, BWN_PHY_AFE_DAC_CTL) & 0x380) >> 7;
12601 if (mac->mac_phy.rev < 2) {
12602 tmp = BWN_PHY_READ(mac,
12610 tmp = BWN_PHY_READ(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL);
12611 tg.tg_pad = BWN_PHY_READ(mac, BWN_PHY_OFDM(0xfb)) & 0xff;
12618 bwn_phy_lp_get_bbmult(struct bwn_mac *mac)
12621 return (bwn_tab_read(mac, BWN_TAB_2(0, 87)) & 0xff00) >> 8;
12625 bwn_phy_lp_set_txgain(struct bwn_mac *mac, struct bwn_txgain *tg)
12629 if (mac->mac_phy.rev < 2) {
12630 BWN_PHY_SETMASK(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL, 0xf800,
12632 bwn_phy_lp_set_txgain_dac(mac, tg->tg_dac);
12633 bwn_phy_lp_set_txgain_override(mac);
12637 pa = bwn_phy_lp_get_pa_gain(mac);
12638 BWN_PHY_WRITE(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL,
12640 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfb), 0x8000,
12642 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xfc), (tg->tg_pga << 8) | tg->tg_gm);
12643 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfd), 0x8000,
12645 bwn_phy_lp_set_txgain_dac(mac, tg->tg_dac);
12646 bwn_phy_lp_set_txgain_override(mac);
12650 bwn_phy_lp_set_bbmult(struct bwn_mac *mac, uint8_t bbmult)
12653 bwn_tab_write(mac, BWN_TAB_2(0, 87), (uint16_t)bbmult << 8);
12657 bwn_phy_lp_set_trsw_over(struct bwn_mac *mac, uint8_t tx, uint8_t rx)
12661 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffc, trsw);
12662 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x3);
12666 bwn_phy_lp_set_rxgain(struct bwn_mac *mac, uint32_t gain)
12668 struct bwn_softc *sc = mac->mac_sc;
12673 if (mac->mac_phy.rev < 2) {
12678 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffe, trsw);
12679 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
12681 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
12683 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, lna);
12690 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffe, trsw);
12691 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
12693 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
12695 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, low_gain);
12696 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xfff0, high_gain);
12699 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
12701 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xe6), 0xffe7,
12706 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1);
12707 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x10);
12708 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x40);
12709 if (mac->mac_phy.rev >= 2) {
12710 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x100);
12712 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x400);
12713 BWN_PHY_SET(mac, BWN_PHY_OFDM(0xe5), 0x8);
12717 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x200);
12721 bwn_phy_lp_set_deaf(struct bwn_mac *mac, uint8_t user)
12723 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
12730 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x80);
12734 bwn_phy_lp_clear_deaf(struct bwn_mac *mac, uint8_t user)
12736 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
12737 struct bwn_softc *sc = mac->mac_sc;
12750 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x60);
12752 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x20);
12756 bwn_sqrt(struct bwn_mac *mac, unsigned int x)
12807 bwn_phy_lp_calc_rx_iq_comp(struct bwn_mac *mac, uint16_t sample)
12830 v1 = BWN_PHY_READ(mac, BWN_PHY_RX_COMP_COEFF_S);
12834 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, 0x00c0);
12835 BWN_PHY_MASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff);
12837 ret = bwn_phy_lp_rx_iq_est(mac, sample, 32, &ie);
12849 tmp[1] = -bwn_sqrt(mac, tmp[1] - (tmp[0] * tmp[0]));
12853 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, v1);
12854 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff, v0 << 8);
12861 bwn_phy_lp_tblinit_r01(struct bwn_mac *mac)
13028 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
13030 bwn_tab_write_multi(mac, BWN_TAB_1(2, 0), N(bwn_tab_sigsq_tbl),
13032 bwn_tab_write_multi(mac, BWN_TAB_2(1, 0), N(noisescale), noisescale);
13033 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(crsgainnft), crsgainnft);
13034 bwn_tab_write_multi(mac, BWN_TAB_2(8, 0), N(filterctl), filterctl);
13035 bwn_tab_write_multi(mac, BWN_TAB_4(9, 0), N(psctl), psctl);
13036 bwn_tab_write_multi(mac, BWN_TAB_1(6, 0), N(bwn_tab_pllfrac_tbl),
13038 bwn_tab_write_multi(mac, BWN_TAB_2(0, 0), N(bwn_tabl_iqlocal_tbl),
13040 if (mac->mac_phy.rev == 0) {
13041 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), N(ofdmcckgain_r0),
13043 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), N(ofdmcckgain_r0),
13046 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), N(ofdmcckgain_r1),
13048 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), N(ofdmcckgain_r1),
13051 bwn_tab_write_multi(mac, BWN_TAB_2(15, 0), N(gaindelta), gaindelta);
13052 bwn_tab_write_multi(mac, BWN_TAB_4(10, 0), N(txpwrctl), txpwrctl);
13056 bwn_phy_lp_tblinit_r2(struct bwn_mac *mac)
13058 struct bwn_softc *sc = mac->mac_sc;
13243 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
13246 bwn_tab_write(mac, BWN_TAB_4(7, i), 0);
13248 bwn_tab_write_multi(mac, BWN_TAB_1(2, 0), N(bwn_tab_sigsq_tbl),
13250 bwn_tab_write_multi(mac, BWN_TAB_2(1, 0), N(noisescale), noisescale);
13251 bwn_tab_write_multi(mac, BWN_TAB_4(11, 0), N(filterctl), filterctl);
13252 bwn_tab_write_multi(mac, BWN_TAB_4(12, 0), N(psctl), psctl);
13253 bwn_tab_write_multi(mac, BWN_TAB_4(13, 0), N(gainidx), gainidx);
13254 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(auxgainidx), auxgainidx);
13255 bwn_tab_write_multi(mac, BWN_TAB_2(15, 0), N(swctl), swctl);
13256 bwn_tab_write_multi(mac, BWN_TAB_1(16, 0), N(hf), hf);
13257 bwn_tab_write_multi(mac, BWN_TAB_4(17, 0), N(gainval), gainval);
13258 bwn_tab_write_multi(mac, BWN_TAB_2(18, 0), N(gain), gain);
13259 bwn_tab_write_multi(mac, BWN_TAB_1(6, 0), N(bwn_tab_pllfrac_tbl),
13261 bwn_tab_write_multi(mac, BWN_TAB_2(0, 0), N(bwn_tabl_iqlocal_tbl),
13263 bwn_tab_write_multi(mac, BWN_TAB_4(9, 0), N(papdeps), papdeps);
13264 bwn_tab_write_multi(mac, BWN_TAB_4(10, 0), N(papdmult), papdmult);
13268 bwn_tab_write_multi(mac, BWN_TAB_4(13, 0), N(gainidx_a0),
13270 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(auxgainidx_a0),
13272 bwn_tab_write_multi(mac, BWN_TAB_4(17, 0), N(gainval_a0),
13274 bwn_tab_write_multi(mac, BWN_TAB_2(18, 0), N(gain_a0), gain_a0);
13279 bwn_phy_lp_tblinit_txgain(struct bwn_mac *mac)
13281 struct bwn_softc *sc = mac->mac_sc;
13884 if (mac->mac_phy.rev != 0 && mac->mac_phy.rev != 1) {
13886 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r2);
13888 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
13891 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
13896 if (mac->mac_phy.rev == 0) {
13899 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r0);
13901 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
13904 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
13911 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r1);
13913 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_2ghz_r1);
13915 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_5ghz_r1);
13919 bwn_tab_write(struct bwn_mac *mac, uint32_t typeoffset, uint32_t value)
13930 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
13931 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
13936 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
13937 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
13940 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
13941 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);
13942 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
13950 bwn_phy_lp_loopback(struct bwn_mac *mac)
13958 bwn_phy_lp_set_trsw_over(mac, 1, 1);
13959 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 1);
13960 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xfffe);
13961 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x800);
13962 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x800);
13963 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
13964 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x8);
13965 BWN_RF_WRITE(mac, BWN_B2062_N_TXCTL_A, 0x80);
13966 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x80);
13967 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x80);
13969 bwn_phy_lp_set_rxgain_idx(mac, i);
13970 bwn_phy_lp_ddfs_turnon(mac, 1, 1, 5, 5, 0);
13971 if (!(bwn_phy_lp_rx_iq_est(mac, 1000, 32, &ie)))
13979 bwn_phy_lp_ddfs_turnoff(mac);
13984 bwn_phy_lp_set_rxgain_idx(struct bwn_mac *mac, uint16_t idx)
13987 bwn_phy_lp_set_rxgain(mac, bwn_tab_read(mac, BWN_TAB_2(12, idx)));
13991 bwn_phy_lp_ddfs_turnon(struct bwn_mac *mac, int i_on, int q_on,
13995 bwn_phy_lp_ddfs_turnoff(mac);
13996 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS_POINTER_INIT, 0xff80);
13997 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS_POINTER_INIT, 0x80ff);
13998 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS_INCR_INIT, 0xff80, incr1);
13999 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS_INCR_INIT, 0x80ff, incr2 << 8);
14000 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xfff7, i_on << 3);
14001 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xffef, q_on << 4);
14002 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xff9f, scale_idx << 5);
14003 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0xfffb);
14004 BWN_PHY_SET(mac, BWN_PHY_AFE_DDFS, 0x2);
14005 BWN_PHY_SET(mac, BWN_PHY_LP_PHY_CTL, 0x20);
14009 bwn_phy_lp_rx_iq_est(struct bwn_mac *mac, uint16_t sample, uint8_t time,
14014 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfff7);
14015 BWN_PHY_WRITE(mac, BWN_PHY_IQ_NUM_SMPLS_ADDR, sample);
14016 BWN_PHY_SETMASK(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xff00, time);
14017 BWN_PHY_MASK(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xfeff);
14018 BWN_PHY_SET(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
14021 if (!(BWN_PHY_READ(mac,
14026 if ((BWN_PHY_READ(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR) & 0x200)) {
14027 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x8);
14031 ie->ie_iqprod = BWN_PHY_READ(mac, BWN_PHY_IQ_ACC_HI_ADDR);
14033 ie->ie_iqprod |= BWN_PHY_READ(mac, BWN_PHY_IQ_ACC_LO_ADDR);
14034 ie->ie_ipwr = BWN_PHY_READ(mac, BWN_PHY_IQ_I_PWR_ACC_HI_ADDR);
14036 ie->ie_ipwr |= BWN_PHY_READ(mac, BWN_PHY_IQ_I_PWR_ACC_LO_ADDR);
14037 ie->ie_qpwr = BWN_PHY_READ(mac, BWN_PHY_IQ_Q_PWR_ACC_HI_ADDR);
14039 ie->ie_qpwr |= BWN_PHY_READ(mac, BWN_PHY_IQ_Q_PWR_ACC_LO_ADDR);
14041 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x8);
14046 bwn_tab_read(struct bwn_mac *mac, uint32_t typeoffset)
14056 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
14057 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;
14060 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
14061 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);
14064 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
14065 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATAHI);
14067 value |= BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);
14078 bwn_phy_lp_ddfs_turnoff(struct bwn_mac *mac)
14081 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0xfffd);
14082 BWN_PHY_MASK(mac, BWN_PHY_LP_PHY_CTL, 0xffdf);
14086 bwn_phy_lp_set_txgain_dac(struct bwn_mac *mac, uint16_t dac)
14090 ctl = BWN_PHY_READ(mac, BWN_PHY_AFE_DAC_CTL) & 0xc7f;
14092 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DAC_CTL, 0xf000, ctl);
14096 bwn_phy_lp_set_txgain_pa(struct bwn_mac *mac, uint16_t gain)
14099 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfb), 0xe03f, gain << 6);
14100 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfd), 0x80ff, gain << 8);
14104 bwn_phy_lp_set_txgain_override(struct bwn_mac *mac)
14107 if (mac->mac_phy.rev < 2)
14108 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x100);
14110 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x80);
14111 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x4000);
14113 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 0x40);
14117 bwn_phy_lp_get_pa_gain(struct bwn_mac *mac)
14120 return BWN_PHY_READ(mac, BWN_PHY_OFDM(0xfb)) & 0x7f;
14135 bwn_phy_lp_gaintbl_write_multi(struct bwn_mac *mac, int offset, int count,
14141 bwn_phy_lp_gaintbl_write(mac, i, table[i]);
14145 bwn_phy_lp_gaintbl_write(struct bwn_mac *mac, int offset,
14149 if (mac->mac_phy.rev >= 2)
14150 bwn_phy_lp_gaintbl_write_r2(mac, offset, data);
14152 bwn_phy_lp_gaintbl_write_r01(mac, offset, data);
14156 bwn_phy_lp_gaintbl_write_r2(struct bwn_mac *mac, int offset,
14159 struct bwn_softc *sc = mac->mac_sc;
14164 KASSERT(mac->mac_phy.rev >= 2, ("%s:%d: fail", __func__, __LINE__));
14167 if (mac->mac_phy.rev >= 3) {
14174 bwn_tab_write(mac, BWN_TAB_4(7, 0xc0 + offset), tmp);
14175 bwn_tab_write(mac, BWN_TAB_4(7, 0x140 + offset),
14180 bwn_phy_lp_gaintbl_write_r01(struct bwn_mac *mac, int offset,
14184 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
14186 bwn_tab_write(mac, BWN_TAB_4(10, 0xc0 + offset),
14189 bwn_tab_write(mac, BWN_TAB_4(10, 0x140 + offset), te.te_bbmult << 20);
14196 struct bwn_mac *mac;
14201 if ((mac = sc->sc_curmac) == NULL)
14203 stats = &mac->mac_stats;