Lines Matching defs:uart
2559 uint64_t uart : 2; /**< Two UART interrupt-enable */
2585 uint64_t uart : 2;
2616 uint64_t uart : 2; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[UART] */
2642 uint64_t uart : 2;
2673 uint64_t uart : 2; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[UART] */
2699 uint64_t uart : 2;
3663 uint64_t uart : 2; /**< Two UART interrupt-enable */
3689 uint64_t uart : 2;
3720 uint64_t uart : 2; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[UART] */
3746 uint64_t uart : 2;
3777 uint64_t uart : 2; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[UART] */
3803 uint64_t uart : 2;
4767 uint64_t uart : 2; /**< Two UART interrupt-enable */
4793 uint64_t uart : 2;
4824 uint64_t uart : 2; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[UART] */
4850 uint64_t uart : 2;
4881 uint64_t uart : 2; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[UART] */
4907 uint64_t uart : 2;
5871 uint64_t uart : 2; /**< Two UART interrupt-enable */
5897 uint64_t uart : 2;
5928 uint64_t uart : 2; /**< Write 1 to clear CIU2_EN_xx_yy_MIO[UART] */
5954 uint64_t uart : 2;
5985 uint64_t uart : 2; /**< Write 1 to enable CIU2_EN_xx_yy_MIO[UART] */
6011 uint64_t uart : 2;
7061 uint64_t uart : 2; /**< Two UART interrupts
7097 uint64_t uart : 2;
7486 uint64_t uart : 2; /**< Two UART interrupts
7522 uint64_t uart : 2;
7911 uint64_t uart : 2; /**< Two UART interrupts
7947 uint64_t uart : 2;
8336 uint64_t uart : 2; /**< Two UART interrupts
8372 uint64_t uart : 2;
8782 uint64_t uart : 2; /**< Two UART interrupts source
8817 uint64_t uart : 2;
9222 uint64_t uart : 2; /**< Two UART interrupts source
9257 uint64_t uart : 2;
9665 uint64_t uart : 2; /**< Two UART interrupts source
9700 uint64_t uart : 2;
10105 uint64_t uart : 2; /**< Two UART interrupts source
10140 uint64_t uart : 2;