Lines Matching refs:__CCGR_NUM

150 #define	__CCGR_NUM(a, b)	((a) * 16 + (b))
152 #define CCGR_ARM_BUS_CLK __CCGR_NUM(0, 0)
153 #define CCGR_ARM_AXI_CLK __CCGR_NUM(0, 1)
154 #define CCGR_ARM_DEBUG_CLK __CCGR_NUM(0, 2)
155 #define CCGR_TZIC_CLK __CCGR_NUM(0, 3)
156 #define CCGR_DAP_CLK __CCGR_NUM(0, 4)
157 #define CCGR_TPIU_CLK __CCGR_NUM(0, 5)
158 #define CCGR_CTI2_CLK __CCGR_NUM(0, 6)
159 #define CCGR_CTI3_CLK __CCGR_NUM(0, 7)
160 #define CCGR_AHBMUX1_CLK __CCGR_NUM(0, 8)
161 #define CCGR_AHBMUX2_CLK __CCGR_NUM(0, 9)
162 #define CCGR_ROMCP_CLK __CCGR_NUM(0, 10)
163 #define CCGR_ROM_CLK __CCGR_NUM(0, 11)
164 #define CCGR_AIPS_TZ1_CLK __CCGR_NUM(0, 12)
165 #define CCGR_AIPS_TZ2_CLK __CCGR_NUM(0, 13)
166 #define CCGR_AHB_MAX_CLK __CCGR_NUM(0, 14)
167 #define CCGR_IIM_CLK __CCGR_NUM(0, 15)
168 #define CCGR_TMAX1_CLK __CCGR_NUM(1, 0)
169 #define CCGR_TMAX2_CLK __CCGR_NUM(1, 1)
170 #define CCGR_TMAX3_CLK __CCGR_NUM(1, 2)
171 #define CCGR_UART1_CLK __CCGR_NUM(1, 3)
172 #define CCGR_UART1_SERIAL_CLK __CCGR_NUM(1, 4)
173 #define CCGR_UART2_CLK __CCGR_NUM(1, 5)
174 #define CCGR_UART2_SERIAL_CLK __CCGR_NUM(1, 6)
175 #define CCGR_UART3_CLK __CCGR_NUM(1, 7)
176 #define CCGR_UART3_SERIAL_CLK __CCGR_NUM(1, 8)
177 #define CCGR_I2C1_SERIAL_CLK __CCGR_NUM(1, 9)
178 #define CCGR_I2C2_SERIAL_CLK __CCGR_NUM(1, 10)
179 #define CCGR_HSI2C_CLK __CCGR_NUM(1, 11)
180 #define CCGR_HSI2C_SERIAL_CLK __CCGR_NUM(1, 12)
181 #define CCGR_FIRI_CLK __CCGR_NUM(1, 13)
182 #define CCGR_FIRI_SERIAL_CLK __CCGR_NUM(1, 14)
183 #define CCGR_SCC_CLK __CCGR_NUM(1, 15)
185 #define CCGR_USB_PHY_CLK __CCGR_NUM(2, 0)
186 #define CCGR_EPIT1_CLK __CCGR_NUM(2, 1)
187 #define CCGR_EPIT1_SERIAL_CLK __CCGR_NUM(2, 2)
188 #define CCGR_EPIT2_CLK __CCGR_NUM(2, 3)
189 #define CCGR_EPIT2_SERIAL_CLK __CCGR_NUM(2, 4)
190 #define CCGR_PWM1_CLK __CCGR_NUM(2, 5)
191 #define CCGR_PWM1_SERIAL_CLK __CCGR_NUM(2, 6)
192 #define CCGR_PWM2_CLK __CCGR_NUM(2, 7)
193 #define CCGR_PWM2_SERIAL_CLK __CCGR_NUM(2, 8)
194 #define CCGR_GPT_CLK __CCGR_NUM(2, 9)
195 #define CCGR_GPT_SERIAL_CLK __CCGR_NUM(2, 10)
196 #define CCGR_OWIRE_CLK __CCGR_NUM(2, 11)
197 #define CCGR_FEC_CLK __CCGR_NUM(2, 12)
198 #define CCGR_USBOH3_IPG_AHB_CLK __CCGR_NUM(2, 13)
199 #define CCGR_USBOH3_60M_CLK __CCGR_NUM(2, 14)
200 #define CCGR_TVE_CLK __CCGR_NUM(2, 15)
202 #define CCGR_ESDHC1_CLK __CCGR_NUM(3, 0)
203 #define CCGR_ESDHC1_SERIAL_CLK __CCGR_NUM(3, 1)
204 #define CCGR_ESDHC2_CLK __CCGR_NUM(3, 2)
205 #define CCGR_ESDHC2_SERIAL_CLK __CCGR_NUM(3, 3)
206 #define CCGR_ESDHC3_CLK __CCGR_NUM(3, 4)
207 #define CCGR_ESDHC3_SERIAL_CLK __CCGR_NUM(3, 5)
208 #define CCGR_ESDHC4_CLK __CCGR_NUM(3, 6)
209 #define CCGR_ESDHC4_SERIAL_CLK __CCGR_NUM(3, 7)
210 #define CCGR_SSI1_CLK __CCGR_NUM(3, 8)
211 #define CCGR_SSI1_SERIAL_CLK __CCGR_NUM(3, 9)
212 #define CCGR_SSI2_CLK __CCGR_NUM(3, 10)
213 #define CCGR_SSI2_SERIAL_CLK __CCGR_NUM(3, 11)
214 #define CCGR_SSI3_CLK __CCGR_NUM(3, 12)
215 #define CCGR_SSI3_SERIAL_CLK __CCGR_NUM(3, 13)
216 #define CCGR_SSI_EXT1_CLK __CCGR_NUM(3, 14)
217 #define CCGR_SSI_EXT2_CLK __CCGR_NUM(3, 15)
219 #define CCGR_PATA_CLK __CCGR_NUM(4, 0)
220 #define CCGR_SIM_CLK __CCGR_NUM(4, 1)
221 #define CCGR_SIM_SERIAL_CLK __CCGR_NUM(4, 2)
222 #define CCGR_SAHARA_CLK __CCGR_NUM(4, 3)
223 #define CCGR_RTIC_CLK __CCGR_NUM(4, 4)
224 #define CCGR_ECSPI1_CLK __CCGR_NUM(4, 5)
225 #define CCGR_ECSPI1_SERIAL_CLK __CCGR_NUM(4, 6)
226 #define CCGR_ECSPI2_CLK __CCGR_NUM(4, 7)
227 #define CCGR_ECSPI2_SERIAL_CLK __CCGR_NUM(4, 8)
228 #define CCGR_CSPI_CLK __CCGR_NUM(4, 9)
229 #define CCGR_SRTC_CLK __CCGR_NUM(4, 10)
230 #define CCGR_SDMA_CLK __CCGR_NUM(4, 11)
232 #define CCGR_SPBA_CLK __CCGR_NUM(5, 0)
233 #define CCGR_GPU_CLK __CCGR_NUM(5, 1)
234 #define CCGR_GARB_CLK __CCGR_NUM(5, 2)
235 #define CCGR_VPU_CLK __CCGR_NUM(5, 3)
236 #define CCGR_VPU_SERIAL_CLK __CCGR_NUM(5, 4)
237 #define CCGR_IPU_CLK __CCGR_NUM(5, 5)
238 #define CCGR_EMI_GARB_CLK __CCGR_NUM(6, 0)
239 #define CCGR_IPU_DI0_CLK __CCGR_NUM(6, 1)
240 #define CCGR_IPU_DI1_CLK __CCGR_NUM(6, 2)
241 #define CCGR_GPU2D_CLK __CCGR_NUM(6, 3)
242 #define CCGR_SLIMBUS_CLK __CCGR_NUM(6, 4)
243 #define CCGR_SLIMBUS_SERIAL_CLK __CCGR_NUM(6, 5)