utils/TableGen/CodeGenSchedule.cpp

140   RecVec ProcRecords = Records.getAllDerivedDefinitions("Processor");
183 static void scanSchedRW(Record *RWDef, RecVec &RWDefs,
190     RecVec Seq = RWDef->getValueAsListOfDefs("Writes");
196     RecVec Vars = RWDef->getValueAsListOfDefs("Variants");
199       RecVec Selected = (*VI)->getValueAsListOfDefs("Selected");
216   RecVec SWDefs, SRDefs;
222     RecVec RWs = SchedDef->getValueAsListOfDefs("SchedRW");
233   RecVec InstRWDefs = Records.getAllDerivedDefinitions("InstRW");
236     RecVec RWDefs = (*OI)->getValueAsListOfDefs("OperandReadWrites");
248   RecVec ItinRWDefs = Records.getAllDerivedDefinitions("ItinRW");
251     RecVec RWDefs = (*II)->getValueAsListOfDefs("OperandReadWrites");
264   RecVec AliasDefs = Records.getAllDerivedDefinitions("SchedAlias");
322     RecVec RWDefs = Records.getAllDerivedDefinitions("SchedReadWrite");
363     RecVec ValidWrites = ReadDef->getValueAsListOfDefs("ValidWrites");
373 void splitSchedReadWrites(const RecVec &RWDefs,
374                           RecVec &WriteDefs, RecVec &ReadDefs) {
387 void CodeGenSchedModels::findRWs(const RecVec &RWDefs,
389     RecVec WriteDefs;
390     RecVec ReadDefs;
397 void CodeGenSchedModels::findRWs(const RecVec &RWDefs, IdxVec &RWs,
526   RecVec InstRWDefs = Records.getAllDerivedDefinitions("InstRW");
567     const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs;
632 std::string CodeGenSchedModels::createSchedClassName(const RecVec &InstDefs) {
685   const RecVec *InstDefs = Sets.expand(InstRWDef);
771     RecVec ItinRecords = ProcModel.ItinsDef->getValueAsListOfDefs("IID");
810   RecVec ItinRWDefs = Records.getAllDerivedDefinitions("ItinRW");
856       RecVec Matched = (*II)->getValueAsListOfDefs("MatchedItinClasses");
874   const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs;
876     const RecVec *InstDefs = Sets.expand(*RWI);
972     RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants");
1050     const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants");
1070       const RecVec VarDefs = AliasRW.TheDef->getValueAsListOfDefs("Variants");
1139     RecVec SelectedDefs = VInfo.VarOrSeqDef->getValueAsListOfDefs("Selected");
1298     RecVec Preds;
1372 bool CodeGenSchedModels::hasSuperGroup(RecVec &SubUnits, CodeGenProcModel &PM) {
1376     RecVec SuperUnits =
1396     RecVec CheckUnits =
1401       RecVec OtherUnits =
1447   RecVec WRDefs = Records.getAllDerivedDefinitions("WriteRes");
1452   RecVec RADefs = Records.getAllDerivedDefinitions("ReadAdvance");
1502       RecVec Matched = (*II)->getValueAsListOfDefs("MatchedItinClasses");
1576   RecVec ProcResourceDefs =
1592   RecVec ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup");
1641   RecVec &WRDefs = ProcModels[PIdx].WriteResDefs;
1648   RecVec ProcResDefs = ProcWriteResDef->getValueAsListOfDefs("ProcResources");
1658   RecVec &RADefs = ProcModels[PIdx].ReadAdvanceDefs;