Lines Matching defs:std
1521 std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
2196 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
2207 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty)));
2296 std::deque< std::pair<unsigned, SDValue> > RegsToPass;
2335 std::swap(Lo, Hi);
2338 RegsToPass.push_back(std::make_pair(LocRegLo, Lo));
2339 RegsToPass.push_back(std::make_pair(LocRegHigh, Hi));
2358 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2491 std::vector<SDValue> OutChains;
2511 std::advance(FuncArg, Ins[i].OrigArgIndex - CurArgIdx);
2576 std::swap(ArgValue, ArgValue2);
2716 getConstraintType(const std::string &Constraint) const
2799 std::pair<unsigned, const TargetRegisterClass*> MipsTargetLowering::
2800 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
2809 return std::make_pair(0U, &Mips::CPU16RegsRegClass);
2810 return std::make_pair(0U, &Mips::CPURegsRegClass);
2813 return std::make_pair(0U, &Mips::CPURegsRegClass);
2815 return std::make_pair(0U, &Mips::CPU64RegsRegClass);
2817 return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
2820 return std::make_pair(0U, &Mips::FGR32RegClass);
2823 return std::make_pair(0U, &Mips::FGR64RegClass);
2824 return std::make_pair(0U, &Mips::AFGR64RegClass);
2829 return std::make_pair((unsigned)Mips::T9, &Mips::CPURegsRegClass);
2831 return std::make_pair((unsigned)Mips::T9_64, &Mips::CPU64RegsRegClass);
2834 return std::make_pair((unsigned)Mips::LO, &Mips::LORegsRegClass);
2835 return std::make_pair((unsigned)Mips::LO64, &Mips::LORegs64RegClass);
2839 return std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
2848 std::string &Constraint,
2849 std::vector<SDValue>&Ops,
3015 return std::binary_search(LibCalls, End, CallSym, Comp);
3042 std::vector<ArgListEntry> &FuncArgs) {
3087 std::advance(FuncArg, Args[I].OrigArgIndex - CurArgIdx);
3156 unsigned Align = std::min(std::max(ArgFlags.getByValAlign(), RegSize),
3236 copyByValRegs(SDValue Chain, DebugLoc DL, std::vector<SDValue> &OutChains,
3243 unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize);
3281 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
3289 unsigned Alignment = std::min(Flags.getByValAlign(), RegSize);
3306 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal));
3353 Alignment = std::min(Alignment, LoadSize);
3357 RegsToPass.push_back(std::make_pair(ArgReg, Val));
3376 MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,