Lines Matching refs:mode
71 neg_const_int (enum machine_mode mode, rtx i)
73 return gen_int_mode (- INTVAL (i), mode);
77 the most significant bit of machine mode MODE. */
80 mode_signbit_p (enum machine_mode mode, rtx x)
85 if (GET_MODE_CLASS (mode) != MODE_INT)
88 width = GET_MODE_BITSIZE (mode);
115 simplify_gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0,
121 tem = simplify_binary_operation (code, mode, op0, op1);
130 return gen_rtx_fmt_ee (code, mode, op0, op1);
190 /* If we're accessing the constant in a different mode than it was
219 simplify_gen_unary (enum rtx_code code, enum machine_mode mode, rtx op,
225 if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
228 return gen_rtx_fmt_e (code, mode, op);
234 simplify_gen_ternary (enum rtx_code code, enum machine_mode mode,
240 if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
244 return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
248 CMP_MODE specifies mode comparison is done in. */
251 simplify_gen_relational (enum rtx_code code, enum machine_mode mode,
256 if (0 != (tem = simplify_relational_operation (code, mode, cmp_mode,
260 return gen_rtx_fmt_ee (code, mode, op0, op1);
271 enum machine_mode mode = GET_MODE (x);
290 return simplify_gen_unary (code, mode, op0, op_mode);
298 return simplify_gen_binary (code, mode, op0, op1);
309 return simplify_gen_relational (code, mode, op_mode, op0, op1);
322 return simplify_gen_ternary (code, mode, op_mode, op0, op1, op2);
357 return gen_rtx_LO_SUM (mode, op0, op1);
373 /* Try to simplify a unary operation CODE whose output mode is to be
374 MODE with input operand OP whose mode was originally OP_MODE.
377 simplify_unary_operation (enum rtx_code code, enum machine_mode mode,
387 tem = simplify_const_unary_operation (code, mode, trueop, op_mode);
391 return simplify_unary_operation_1 (code, mode, op);
397 simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op)
412 && (mode == BImode || STORE_FLAG_VALUE == -1)
414 return simplify_gen_relational (reversed, mode, VOIDmode,
420 return simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
429 && (temp = simplify_unary_operation (NOT, mode,
430 XEXP (op, 1), mode)) != 0)
431 return simplify_gen_binary (XOR, mode, XEXP (op, 0), temp);
436 && mode_signbit_p (mode, XEXP (op, 1))
437 && (temp = simplify_unary_operation (NOT, mode,
438 XEXP (op, 1), mode)) != 0)
439 return simplify_gen_binary (XOR, mode, XEXP (op, 0), temp);
450 temp = simplify_gen_unary (NOT, mode, const1_rtx, mode);
451 return simplify_gen_binary (ROTATE, mode, temp, XEXP (op, 1));
461 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
462 return simplify_gen_relational (GE, mode, VOIDmode,
480 return rtl_hooks.gen_lowpart_no_emit (mode, x);
498 op_mode = mode;
508 mode, in1, in2);
520 return simplify_gen_unary (NOT, mode, XEXP (op, 0), mode);
529 rounding mode is towards +infinity (or -infinity) then the two
532 && !HONOR_SIGNED_ZEROS (mode)
533 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
534 return simplify_gen_binary (MINUS, mode, XEXP (op, 1), XEXP (op, 0));
537 && !HONOR_SIGNED_ZEROS (mode)
538 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
544 temp = simplify_unary_operation (NEG, mode, XEXP (op, 1), mode);
546 return simplify_gen_binary (MINUS, mode, temp, XEXP (op, 0));
550 temp = simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
551 return simplify_gen_binary (MINUS, mode, temp, XEXP (op, 1));
557 && !HONOR_SIGN_DEPENDENT_ROUNDING (mode))
559 temp = simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
560 return simplify_gen_binary (MULT, mode, temp, XEXP (op, 1));
568 temp = simplify_unary_operation (NEG, mode, XEXP (op, 0), mode);
570 return simplify_gen_binary (ASHIFT, mode, temp, XEXP (op, 1));
577 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
578 return simplify_gen_binary (LSHIFTRT, mode,
585 && INTVAL (XEXP (op, 1)) == GET_MODE_BITSIZE (mode) - 1)
586 return simplify_gen_binary (ASHIFTRT, mode,
592 && nonzero_bits (XEXP (op, 0), mode) == 1)
607 if (mode == inner)
609 if (GET_MODE_BITSIZE (mode) > isize)
610 return simplify_gen_unary (SIGN_EXTEND, mode, temp, inner);
611 return simplify_gen_unary (TRUNCATE, mode, temp, inner);
617 if (mode == inner)
619 if (GET_MODE_BITSIZE (mode) > isize)
620 return simplify_gen_unary (ZERO_EXTEND, mode, temp, inner);
621 return simplify_gen_unary (TRUNCATE, mode, temp, inner);
627 /* We can't handle truncation to a partial integer mode here
629 integer mode. */
630 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
636 && GET_MODE (XEXP (op, 0)) == mode)
645 && GET_MODE (XEXP (XEXP (op, 0), 0)) == mode)
646 return simplify_gen_unary (GET_CODE (op), mode,
647 XEXP (XEXP (op, 0), 0), mode);
654 return simplify_gen_unary (TRUNCATE, mode, XEXP (SUBREG_REG (op), 0),
664 if ((TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
668 - GET_MODE_BITSIZE (mode)))
669 : truncated_to_mode (mode, op))
672 return rtl_hooks.gen_lowpart_no_emit (mode, op);
676 but it works even if the comparison is done in a mode larger
678 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
680 && ((HOST_WIDE_INT) STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0)
681 return rtl_hooks.gen_lowpart_no_emit (mode, op);
685 if (DECIMAL_FLOAT_MODE_P (mode))
690 && GET_MODE (XEXP (op, 0)) == mode)
707 > GET_MODE_SIZE (mode)
709 mode,
710 XEXP (op, 0), mode);
719 return simplify_gen_unary (FLOAT, mode,
728 && GET_MODE (XEXP (XEXP (op, 0), 0)) == mode)
729 return simplify_gen_unary (GET_CODE (op), mode,
730 XEXP (XEXP (op, 0), 0), mode);
741 if (DECIMAL_FLOAT_MODE_P (mode))
755 return simplify_gen_unary (GET_CODE (op), mode,
764 return simplify_gen_unary (ABS, mode, XEXP (op, 0),
767 /* If the mode of the operand is VOIDmode (i.e. if it is ASM_OPERANDS),
783 if (num_sign_bit_copies (op, mode) == GET_MODE_BITSIZE (mode))
784 return gen_rtx_NEG (mode, op);
792 return simplify_gen_unary (FFS, mode, XEXP (op, 0),
800 return simplify_gen_unary (code, mode, XEXP (op, 0),
807 return simplify_gen_unary (FLOAT, mode, XEXP (op, 0),
813 becomes just the MINUS if its mode is MODE. This allows
817 && GET_MODE (XEXP (op, 0)) == mode
825 target mode is the same as the variable's promotion. */
829 && GET_MODE (XEXP (op, 0)) == mode)
834 && mode == Pmode && GET_MODE (op) == ptr_mode
847 target mode is the same as the variable's promotion. */
851 && GET_MODE (XEXP (op, 0)) == mode)
856 && mode == Pmode && GET_MODE (op) == ptr_mode
873 /* Try to compute the value of a unary operation CODE whose output mode is to
874 be MODE with input operand OP whose mode was originally OP_MODE.
877 simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
880 unsigned int width = GET_MODE_BITSIZE (mode);
884 gcc_assert (VECTOR_MODE_P (mode));
888 gcc_assert (GET_MODE_INNER (mode) == GET_MODE (op));
890 gcc_assert (GET_MODE_INNER (mode) == GET_MODE_INNER
896 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
897 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
915 return gen_rtx_CONST_VECTOR (mode, v);
919 if (VECTOR_MODE_P (mode) && GET_CODE (op) == CONST_VECTOR)
921 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
922 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
932 rtx x = simplify_unary_operation (code, GET_MODE_INNER (mode),
939 return gen_rtx_CONST_VECTOR (mode, v);
943 check the wrong mode (input vs. output) for a conversion operation,
957 REAL_VALUE_FROM_INT (d, lv, hv, mode);
958 d = real_value_truncate (mode, d);
959 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
985 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
986 d = real_value_truncate (mode, d);
987 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
1013 arg0 &= GET_MODE_MASK (mode);
1018 arg0 &= GET_MODE_MASK (mode);
1019 if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
1022 val = GET_MODE_BITSIZE (mode) - floor_log2 (arg0) - 1;
1026 arg0 &= GET_MODE_MASK (mode);
1031 if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
1032 val = GET_MODE_BITSIZE (mode);
1039 arg0 &= GET_MODE_MASK (mode);
1046 arg0 &= GET_MODE_MASK (mode);
1059 original mode. */
1063 /* If we were really extending the mode,
1077 op_mode = mode;
1080 /* If we were really extending the mode,
1110 return gen_int_mode (val, mode);
1162 lv = GET_MODE_BITSIZE (mode) - floor_log2 (h1) - 1
1165 lv = GET_MODE_BITSIZE (mode) - floor_log2 (l1) - 1;
1166 else if (! CLZ_DEFINED_VALUE_AT_ZERO (mode, lv))
1167 lv = GET_MODE_BITSIZE (mode);
1176 else if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, lv))
1177 lv = GET_MODE_BITSIZE (mode);
1200 /* This is just a change-of-mode, so do nothing. */
1237 return immed_double_const (lv, hv, mode);
1241 && SCALAR_FLOAT_MODE_P (mode))
1249 if (HONOR_SNANS (mode) && real_isnan (&d))
1251 real_sqrt (&t, mode, &d);
1261 d = real_value_truncate (mode, d);
1264 /* All this does is change the mode. */
1277 real_from_target (&d, tmp, mode);
1283 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
1288 && GET_MODE_CLASS (mode) == MODE_INT
1383 return immed_double_const (xl, xh, mode);
1391 associative binary operation CODE with result mode MODE, operating
1397 simplify_associative_operation (enum rtx_code code, enum machine_mode mode,
1408 tem = simplify_gen_binary (code, mode, op0, XEXP (op1, 0));
1409 return simplify_gen_binary (code, mode, tem, XEXP (op1, 1));
1414 return simplify_gen_binary (code, mode, op1, op0);
1426 tem = simplify_gen_binary (code, mode, XEXP (op0, 0), op1);
1427 return simplify_gen_binary (code, mode, tem, XEXP (op0, 1));
1432 ? simplify_binary_operation (code, mode, op1, XEXP (op0, 1))
1433 : simplify_binary_operation (code, mode, XEXP (op0, 1), op1);
1435 return simplify_gen_binary (code, mode, XEXP (op0, 0), tem);
1439 ? simplify_binary_operation (code, mode, op1, XEXP (op0, 0))
1440 : simplify_binary_operation (code, mode, XEXP (op0, 0), op1);
1442 return simplify_gen_binary (code, mode, tem, XEXP (op0, 1));
1449 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
1455 simplify_binary_operation (enum rtx_code code, enum machine_mode mode,
1461 /* Relational operations don't work here. We must know the mode
1478 tem = simplify_const_binary_operation (code, mode, trueop0, trueop1);
1481 return simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
1485 CODE with result mode MODE, operating on OP0 and OP1. If OP0 and/or
1490 simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
1495 unsigned int width = GET_MODE_BITSIZE (mode);
1505 when x is -0 and the rounding mode is not towards -infinity,
1507 if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
1513 return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1515 return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1518 if (INTEGRAL_MODE_P (mode)
1521 return simplify_gen_unary (NEG, mode, XEXP (op0, 0), mode);
1542 if (SCALAR_INT_MODE_P (mode))
1596 rtx orig = gen_rtx_PLUS (mode, op0, op1);
1602 coeff = immed_double_const (l, h, mode);
1604 tem = simplify_gen_binary (MULT, mode, lhs, coeff);
1616 && mode_signbit_p (mode, op1))
1617 return simplify_gen_binary (XOR, mode, XEXP (op0, 0),
1618 simplify_gen_binary (XOR, mode, op1,
1629 return simplify_gen_binary (MINUS, mode, op1,
1630 simplify_gen_binary (MULT, mode,
1640 && (reversed = reversed_comparison (op0, mode)))
1642 simplify_gen_unary (NEG, mode, reversed, mode);
1650 if (INTEGRAL_MODE_P (mode)
1653 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
1658 if (FLOAT_MODE_P (mode)
1661 tem = simplify_associative_operation (code, mode, op0, op1);
1676 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1677 && trueop1 == CONST0_RTX (mode))
1708 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1709 return CONST0_RTX (mode);
1713 But if the mode has signed zeros, and does not round towards
1715 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1716 return simplify_gen_unary (NEG, mode, op1, mode);
1720 return simplify_gen_unary (NOT, mode, op1, mode);
1722 /* Subtracting 0 has no effect unless the mode has signed zeros
1725 if (!(HONOR_SIGNED_ZEROS (mode)
1726 && HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1727 && trueop1 == CONST0_RTX (mode))
1736 if (SCALAR_INT_MODE_P (mode))
1790 rtx orig = gen_rtx_MINUS (mode, op0, op1);
1796 coeff = immed_double_const (l, h, mode);
1798 tem = simplify_gen_binary (MULT, mode, lhs, coeff);
1806 return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1813 tem = simplify_unary_operation (NEG, mode, op1, mode);
1815 return simplify_gen_binary (MINUS, mode, tem, XEXP (op0, 0));
1820 return simplify_gen_binary (PLUS, mode,
1822 neg_const_int (mode, op1));
1829 tem = simplify_gen_unary (NOT, mode, XEXP (op1, 1),
1831 return simplify_gen_binary (AND, mode, op0, tem);
1835 tem = simplify_gen_unary (NOT, mode, XEXP (op1, 0),
1837 return simplify_gen_binary (AND, mode, op0, tem);
1846 && (reversed = reversed_comparison (op1, mode)))
1857 return simplify_gen_binary (PLUS, mode,
1858 simplify_gen_binary (MULT, mode,
1870 in1 = simplify_gen_unary (NEG, mode, XEXP (op1, 0), mode);
1872 return simplify_gen_binary (MINUS, mode,
1873 simplify_gen_binary (MULT, mode,
1885 if (INTEGRAL_MODE_P (mode)
1888 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
1894 return simplify_gen_unary (NEG, mode, op0, mode);
1898 when the mode has signed zeros, since multiplying a negative
1900 if (!HONOR_NANS (mode)
1901 && !HONOR_SIGNED_ZEROS (mode)
1902 && trueop1 == CONST0_RTX (mode)
1908 if (!HONOR_SNANS (mode)
1909 && trueop1 == CONST1_RTX (mode))
1916 /* If the mode is larger than the host word size, and the
1921 return simplify_gen_binary (ASHIFT, mode, op0, GEN_INT (val));
1927 && GET_MODE (op0) == mode
1930 return simplify_gen_binary (ASHIFT, mode, op0,
1936 && GET_MODE (op0) == mode)
1942 return simplify_gen_binary (PLUS, mode, op0, copy_rtx (op0));
1944 if (!HONOR_SNANS (mode)
1946 return simplify_gen_unary (NEG, mode, op0, mode);
1950 if (FLOAT_MODE_P (mode)
1955 return simplify_gen_binary (MULT, mode, XEXP (op0, 0), XEXP (op1, 0));
1958 if (SCALAR_FLOAT_MODE_P (mode)
1963 return simplify_gen_binary (MULT, mode, XEXP (op0, 0), XEXP (op1, 0));
1967 if (! FLOAT_MODE_P (mode)
1970 tem = simplify_associative_operation (code, mode, op0, op1);
1980 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1981 == GET_MODE_MASK (mode)))
1989 && SCALAR_INT_MODE_P (mode))
1994 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
1995 && (nonzero_bits (op0, mode) & ~INTVAL (op1)) == 0)
2007 mode size to (rotate A CX). */
2026 == GET_MODE_BITSIZE (mode)))
2027 return gen_rtx_ROTATE (mode, XEXP (opright, 0), XEXP (opleft, 1));
2029 /* Same, but for ashift that has been "simplified" to a wider mode
2045 == GET_MODE_BITSIZE (mode)))
2046 return gen_rtx_ROTATE (mode, XEXP (opright, 0),
2052 && (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2058 return simplify_gen_binary (IOR, mode,
2060 (AND, mode, XEXP (op0, 0),
2080 && (mask & nonzero_bits (XEXP (op0, 0), mode)) == 0)
2081 return simplify_gen_binary (ASHIFTRT, mode,
2086 tem = simplify_associative_operation (code, mode, op0, op1);
2095 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
2096 == GET_MODE_MASK (mode)))
2097 return simplify_gen_unary (NOT, mode, op0, mode);
2100 && GET_MODE_CLASS (mode) != MODE_CC)
2101 return CONST0_RTX (mode);
2106 && mode_signbit_p (mode, op1))
2107 return simplify_gen_binary (PLUS, mode, op0, op1);
2114 && mode_signbit_p (mode, XEXP (op0, 1)))
2115 return simplify_gen_binary (XOR, mode, XEXP (op0, 0),
2116 simplify_gen_binary (XOR, mode, op1,
2123 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2124 && (nonzero_bits (op0, mode)
2125 & nonzero_bits (op1, mode)) == 0)
2126 return (simplify_gen_binary (IOR, mode, op0, op1));
2140 return simplify_gen_binary (XOR, mode, op0, op1);
2142 return simplify_gen_unary (NOT, mode,
2143 simplify_gen_binary (XOR, mode, op0, op1),
2144 mode);
2154 return simplify_gen_binary (AND, mode,
2155 simplify_gen_unary (NOT, mode,
2156 XEXP (op0, 0), mode),
2162 return simplify_gen_binary (AND, mode,
2163 simplify_gen_unary (NOT, mode,
2164 XEXP (op0, 1), mode),
2172 && (reversed = reversed_comparison (op0, mode)))
2183 && INTVAL (XEXP (op0, 1)) == GET_MODE_BITSIZE (mode) - 1)
2184 return gen_rtx_GE (mode, XEXP (op0, 0), const0_rtx);
2188 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2189 && ((STORE_FLAG_VALUE & GET_MODE_MASK (mode))
2190 == (unsigned HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1))
2193 && (reversed = reversed_comparison (op0, mode)))
2198 tem = simplify_associative_operation (code, mode, op0, op1);
2204 if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
2209 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2210 && (nonzero_bits (trueop0, mode) & ~INTVAL (trueop1)) == 0)
2213 && GET_MODE_CLASS (mode) != MODE_CC)
2219 && GET_MODE_CLASS (mode) != MODE_CC)
2220 return CONST0_RTX (mode);
2223 there are no nonzero bits of C outside of X's mode. */
2227 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2235 return simplify_gen_unary (ZERO_EXTEND, mode, tem, imode);
2243 return simplify_gen_binary (AND, mode,
2244 simplify_gen_unary (NOT, mode,
2245 XEXP (op0, 1), mode),
2251 return simplify_gen_binary (AND, mode,
2252 simplify_gen_unary (NOT, mode,
2253 XEXP (op0, 0), mode),
2261 return simplify_gen_binary (AND, mode, XEXP (XEXP (op0, 0), 1), op1);
2267 return simplify_gen_binary (AND, mode, XEXP (XEXP (op0, 0), 0), op1);
2283 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
2318 tem = simplify_gen_binary (GET_CODE (op0), mode,
2320 return simplify_gen_binary (code, mode, tem, op1);
2323 tem = simplify_associative_operation (code, mode, op0, op1);
2330 if (trueop0 == CONST0_RTX (mode))
2333 return simplify_gen_binary (AND, mode, op1, trueop0);
2337 if (trueop1 == CONST1_RTX (mode))
2338 return rtl_hooks.gen_lowpart_no_emit (mode, op0);
2342 return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (val));
2347 if (SCALAR_FLOAT_MODE_P (mode))
2353 if (trueop0 == CONST0_RTX (mode)
2354 && !HONOR_NANS (mode)
2355 && !HONOR_SIGNED_ZEROS (mode)
2359 if (trueop1 == CONST1_RTX (mode)
2360 && !HONOR_SNANS (mode))
2364 && trueop1 != CONST0_RTX (mode))
2371 && !HONOR_SNANS (mode))
2372 return simplify_gen_unary (NEG, mode, op0, mode);
2380 tem = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2381 return simplify_gen_binary (MULT, mode, op0, tem);
2388 if (trueop0 == CONST0_RTX (mode))
2391 return simplify_gen_binary (AND, mode, op1, trueop0);
2395 if (trueop1 == CONST1_RTX (mode))
2396 return rtl_hooks.gen_lowpart_no_emit (mode, op0);
2400 rtx x = rtl_hooks.gen_lowpart_no_emit (mode, op0);
2401 return simplify_gen_unary (NEG, mode, x, mode);
2408 if (trueop0 == CONST0_RTX (mode))
2411 return simplify_gen_binary (AND, mode, op1, trueop0);
2415 if (trueop1 == CONST1_RTX (mode))
2418 return simplify_gen_binary (AND, mode, op0, CONST0_RTX (mode));
2419 return CONST0_RTX (mode);
2424 return simplify_gen_binary (AND, mode, op0,
2430 if (trueop0 == CONST0_RTX (mode))
2433 return simplify_gen_binary (AND, mode, op1, trueop0);
2437 if (trueop1 == CONST1_RTX (mode) || trueop1 == constm1_rtx)
2440 return simplify_gen_binary (AND, mode, op0, CONST0_RTX (mode));
2441 return CONST0_RTX (mode);
2448 if (trueop1 == CONST0_RTX (mode))
2450 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2454 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
2461 if (trueop1 == CONST0_RTX (mode))
2463 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2468 if (trueop1 == CONST0_RTX (mode))
2470 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2484 return simplify_gen_relational (EQ, mode, imode,
2497 tem = simplify_associative_operation (code, mode, op0, op1);
2506 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
2511 tem = simplify_associative_operation (code, mode, op0, op1);
2517 if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
2521 tem = simplify_associative_operation (code, mode, op0, op1);
2531 tem = simplify_associative_operation (code, mode, op0, op1);
2544 if (!VECTOR_MODE_P (mode))
2547 gcc_assert (mode == GET_MODE_INNER (GET_MODE (trueop0)));
2559 gcc_assert (GET_MODE_INNER (mode)
2565 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2566 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2580 return gen_rtx_CONST_VECTOR (mode, v);
2589 int offset = INTVAL (XVECEXP (trueop1, 0, 0)) * GET_MODE_SIZE (mode);
2592 while (GET_MODE (vec) != mode
2606 if (GET_MODE (vec) == mode)
2615 : GET_MODE_INNER (mode));
2618 : GET_MODE_INNER (mode));
2620 gcc_assert (VECTOR_MODE_P (mode));
2622 == GET_MODE_SIZE (mode));
2625 gcc_assert (GET_MODE_INNER (mode)
2628 gcc_assert (GET_MODE_INNER (mode) == op0_mode);
2631 gcc_assert (GET_MODE_INNER (mode)
2634 gcc_assert (GET_MODE_INNER (mode) == op1_mode);
2643 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
2644 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
2670 return gen_rtx_CONST_VECTOR (mode, v);
2683 simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
2688 unsigned int width = GET_MODE_BITSIZE (mode);
2690 if (VECTOR_MODE_P (mode)
2695 unsigned n_elts = GET_MODE_NUNITS (mode);
2707 rtx x = simplify_binary_operation (code, GET_MODE_INNER (mode),
2715 return gen_rtx_CONST_VECTOR (mode, v);
2718 if (VECTOR_MODE_P (mode)
2722 unsigned n_elts = GET_MODE_NUNITS (mode);
2750 return gen_rtx_CONST_VECTOR (mode, v);
2753 if (SCALAR_FLOAT_MODE_P (mode)
2756 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
2788 real_from_target (&r, tmp0, mode);
2789 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
2798 real_convert (&f0, mode, &f0);
2799 real_convert (&f1, mode, &f1);
2801 if (HONOR_SNANS (mode)
2807 && (flag_trapping_math || ! MODE_HAS_INFINITIES (mode)))
2810 if (MODE_HAS_INFINITIES (mode) && HONOR_NANS (mode)
2837 if (code == MULT && MODE_HAS_INFINITIES (mode) && HONOR_NANS (mode)
2847 real_convert (&result, mode, &value);
2853 && MODE_HAS_INFINITIES (mode)
2861 result may dependent upon the run-time rounding mode and
2866 || (REAL_MODE_FORMAT_COMPOSITE_P (mode)
2871 return CONST_DOUBLE_FROM_REAL_VALUE (result, mode);
2876 if (GET_MODE_CLASS (mode) == MODE_INT
2991 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
2993 if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
2997 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3000 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3002 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3004 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3011 return immed_double_const (lv, hv, mode);
3114 else if (arg1 < 0 || arg1 >= GET_MODE_BITSIZE (mode))
3178 return gen_int_mode (val, mode);
3220 simplify_plus_minus (enum rtx_code code, enum machine_mode mode, rtx op0,
3306 ops[i].op = neg_const_int (mode, this_op);
3335 lhs = gen_rtx_NEG (mode, ops[0].op);
3349 return simplify_const_binary_operation (code, mode, lhs, rhs);
3402 tem = simplify_binary_operation (ncode, mode, tem_lhs, tem_rhs);
3408 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
3424 tem = neg_const_int (mode, tem), lneg = 0;
3450 return gen_rtx_fmt_ee (MINUS, mode, ops[1].op, ops[0].op);
3464 value = neg_const_int (mode, value);
3474 ops[0].op = gen_rtx_NEG (mode, ops[0].op);
3487 mode, result, ops[i].op);
3505 MODE is the mode of the result. If MODE is VOIDmode, both operands must
3508 CMP_MODE specifies in which mode the comparison is done in, so it is
3509 the mode of the operands. If CMP_MODE is VOIDmode, it is taken from
3513 simplify_relational_operation (enum rtx_code code, enum machine_mode mode,
3526 if (SCALAR_FLOAT_MODE_P (mode))
3529 return CONST0_RTX (mode);
3533 val = FLOAT_STORE_FLAG_VALUE (mode);
3534 return CONST_DOUBLE_FROM_REAL_VALUE (val, mode);
3540 if (VECTOR_MODE_P (mode))
3543 return CONST0_RTX (mode);
3549 rtx val = VECTOR_STORE_FLAG_VALUE (mode);
3553 return CONST1_RTX (mode);
3555 units = GET_MODE_NUNITS (mode);
3559 return gen_rtx_raw_CONST_VECTOR (mode, v);
3576 return simplify_relational_operation (code, mode, VOIDmode,
3585 return simplify_relational_operation_1 (code, mode, cmp_mode,
3592 MODE is the mode of the result, while CMP_MODE specifies in which
3593 mode the comparison is done in, so it is the mode of the operands. */
3596 simplify_relational_operation_1 (enum rtx_code code, enum machine_mode mode,
3609 if (GET_MODE (op0) == mode)
3612 return simplify_gen_relational (GET_CODE (op0), mode, VOIDmode,
3619 return simplify_gen_relational (new_code, mode, VOIDmode,
3637 return simplify_gen_relational (code, mode, cmp_mode, x, c);
3644 && GET_MODE_CLASS (mode) == MODE_INT
3647 && mode != BImode
3651 return GET_MODE_SIZE (mode) > GET_MODE_SIZE (cmp_mode)
3652 ? simplify_gen_unary (ZERO_EXTEND, mode, op0, cmp_mode)
3653 : lowpart_subreg (mode, op0, cmp_mode);
3659 return simplify_gen_relational (code, mode, cmp_mode,
3667 return simplify_gen_relational (code, mode, cmp_mode,
3675 return simplify_gen_relational (code, mode, cmp_mode,
3685 return simplify_gen_relational (code, mode, cmp_mode, XEXP (op0, 0),
3699 enum machine_mode mode,
3707 gcc_assert (mode != VOIDmode
3718 mode = GET_MODE (op0);
3720 mode = GET_MODE (op1);
3750 if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
3754 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
3758 mode, tem, const0_rtx);
3760 if (! HONOR_NANS (mode) && code == ORDERED)
3763 if (! HONOR_NANS (mode) && code == UNORDERED)
3814 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
3820 int width = GET_MODE_BITSIZE (mode);
3874 if (SCALAR_INT_MODE_P (mode)
3875 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3888 get_mode_bounds (mode, sign, mode, &mmin, &mmax);
3944 if (trueop1 == CONST0_RTX (mode)
3945 && !HONOR_SNANS (mode)
3946 && (!INTEGRAL_MODE_P (mode)
3953 if (INTEGRAL_MODE_P (mode)
3966 if (trueop1 == CONST0_RTX (mode)
3967 && !HONOR_NANS (mode)
3968 && (!INTEGRAL_MODE_P (mode)
3975 if (INTEGRAL_MODE_P (mode)
3988 if (trueop1 == CONST0_RTX (mode))
4044 /* Simplify CODE, an operation with result mode MODE and three operands,
4045 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4049 simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
4053 unsigned int width = GET_MODE_BITSIZE (mode);
4088 /* Clear the bits that don't belong in our mode,
4091 unsigned value for this mode. */
4097 return gen_int_mode (val, mode);
4112 && ! HONOR_NANS (mode)
4113 && ! HONOR_SIGNED_ZEROS (mode)
4123 && ! HONOR_NANS (mode)
4124 && ! HONOR_SIGNED_ZEROS (mode)
4157 return simplify_gen_relational (code, mode, cmp_mode,
4173 return gen_rtx_IF_THEN_ELSE (mode, temp, op1, op2);
4179 gcc_assert (GET_MODE (op0) == mode);
4180 gcc_assert (GET_MODE (op1) == mode);
4181 gcc_assert (VECTOR_MODE_P (mode));
4185 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
4186 unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
4206 return gen_rtx_CONST_VECTOR (mode, v);
4512 /* Changing mode twice with SUBREG => just change it once,
4513 or not at all if changing back op starting mode. */
4594 and/or mode. If the hard register is not valid in that mode,
4623 its mode. This is a kludge to work around how float/complex
4658 SUBREG with it. Don't do this if the MEM has a mode-dependent address
4704 can just extend to the appropriate mode. */
4728 the outer subreg is effectively a truncation to the original mode. */
4747 the outer subreg is effectively a truncation to the original mode. */
4762 the outer subreg is effectively a truncation to the original mode. */
4845 enum machine_mode mode = GET_MODE (x);
4850 return simplify_unary_operation (code, mode,
4854 return simplify_gen_binary (code, mode, XEXP (x, 1), XEXP (x, 0));
4859 return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
4863 return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
4869 return simplify_relational_operation (code, mode,
4879 return simplify_gen_subreg (mode, SUBREG_REG (x),