Lines Matching refs:dest
1931 mips_force_temporary (rtx dest, rtx value)
1937 emit_move_insn (copy_rtx (dest), value);
1938 return dest;
2066 rtx dest, insn, v0, v1, tmp1, tmp2, eqv;
2083 dest = gen_reg_rtx (Pmode);
2084 emit_libcall_block (insn, dest, v0, loc);
2098 dest = gen_rtx_LO_SUM (Pmode, tmp2,
2115 dest = gen_reg_rtx (Pmode);
2116 emit_insn (gen_add3_insn (dest, tmp1, v1));
2126 dest = gen_rtx_LO_SUM (Pmode, tmp1,
2134 return dest;
2283 mips_move_integer (rtx dest, rtx temp, unsigned HOST_WIDE_INT value)
2290 mode = GET_MODE (dest);
2308 emit_insn (gen_rtx_SET (VOIDmode, dest, x));
2317 mips_legitimize_const_move (enum machine_mode mode, rtx dest, rtx src)
2325 mips_move_integer (dest, dest, INTVAL (src));
2332 emit_insn (gen_rtx_SET (VOIDmode, dest, mips_split_symbol (dest, src)));
2338 emit_move_insn (dest, mips_legitimize_tls_address (src));
2350 base = mips_force_temporary (dest, base);
2351 emit_move_insn (dest, mips_add_offset (0, base, offset));
2360 src = replace_equiv_address (src, mips_split_symbol (dest, XEXP (src, 0)));
2361 emit_move_insn (dest, src);
2369 mips_legitimize_move (enum machine_mode mode, rtx dest, rtx src)
2371 if (!register_operand (dest, mode) && !reg_or_0_operand (src, mode))
2373 emit_move_insn (dest, force_reg (mode, src));
2380 && REG_P (dest) && GP_REG_P (REGNO (dest)))
2384 emit_insn (gen_mfhilo_si (gen_rtx_REG (SImode, REGNO (dest)),
2388 emit_insn (gen_mfhilo_di (gen_rtx_REG (DImode, REGNO (dest)),
2398 mips_legitimize_const_move (mode, dest, src);
2803 mips_split_64bit_move_p (rtx dest, rtx src)
2809 if (FP_REG_RTX_P (src) && FP_REG_RTX_P (dest))
2816 if (FP_REG_RTX_P (dest) && MEM_P (src))
2818 if (FP_REG_RTX_P (src) && MEM_P (dest))
2841 mips_split_64bit_move (rtx dest, rtx src)
2843 if (FP_REG_RTX_P (dest))
2846 emit_insn (gen_load_df_low (copy_rtx (dest), mips_subword (src, 0)));
2847 emit_insn (gen_load_df_high (dest, mips_subword (src, 1),
2848 copy_rtx (dest)));
2853 emit_move_insn (mips_subword (dest, 0), mips_subword (src, 0));
2854 emit_insn (gen_store_df_high (mips_subword (dest, 1), src));
2862 low_dest = mips_subword (dest, 0);
2866 emit_move_insn (mips_subword (dest, 1), mips_subword (src, 1));
2872 emit_move_insn (mips_subword (dest, 1), mips_subword (src, 1));
2882 mips_output_move (rtx dest, rtx src)
2887 dest_code = GET_CODE (dest);
2889 dbl_p = (GET_MODE_SIZE (GET_MODE (dest)) == 8);
2891 if (dbl_p && mips_split_64bit_move_p (dest, src))
2895 || (!TARGET_MIPS16 && src == CONST0_RTX (GET_MODE (dest))))
2899 if (GP_REG_P (REGNO (dest)))
2902 if (MD_REG_P (REGNO (dest)))
2905 if (DSP_ACC_REG_P (REGNO (dest)))
2908 retval[2] = reg_names[REGNO (dest)][4];
2909 retval[3] = reg_names[REGNO (dest)][5];
2913 if (FP_REG_P (REGNO (dest)))
2916 if (ALL_COP_REG_P (REGNO (dest)))
2920 retval[4] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (dest));
2927 if (dest_code == REG && GP_REG_P (REGNO (dest)))
2982 if (dest_code == REG && FP_REG_P (REGNO (dest)))
2984 if (GET_MODE (dest) == V2SFmode)
2993 if (dest_code == REG && FP_REG_P (REGNO (dest)))
2998 if (dest_code == REG && ALL_COP_REG_P (REGNO (dest)) && src_code == MEM)
3003 retval[3] = COPNUM_AS_CHAR_FROM_REGNUM (REGNO (dest));
3314 mips_expand_vcondv2sf (rtx dest, rtx true_src, rtx false_src,
3325 emit_insn (gen_mips_cond_move_tf_ps (dest, false_src, true_src,
3328 emit_insn (gen_mips_cond_move_tf_ps (dest, true_src, false_src,
3396 mips_load_call_address (rtx dest, rtx addr, int sibcall_p)
3408 high = mips_unspec_offset_high (dest, pic_offset_table_rtx,
3412 emit_insn (gen_load_callsi (dest, high, lo_sum_symbol));
3414 emit_insn (gen_load_calldi (dest, high, lo_sum_symbol));
3417 emit_move_insn (dest, addr);
3496 mips_emit_fcc_reload (rtx dest, rtx src, rtx scratch)
3511 emit_insn (gen_slt_sf (dest, fp2, fp1));
3537 mips_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length)
3551 && MEM_ALIGN (dest) == BITS_PER_WORD / 2)
3579 if (MEM_ALIGN (dest) >= bits)
3580 emit_move_insn (adjust_address (dest, mode, offset), regs[i]);
3583 rtx part = adjust_address (dest, BLKmode, offset);
3592 dest = adjust_address (dest, BLKmode, offset);
3593 move_by_pieces (dest, src, length - offset,
3594 MIN (MEM_ALIGN (src), MEM_ALIGN (dest)), 0);
3629 mips_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length)
3639 mips_adjust_block_mem (dest, MAX_MOVE_BYTES, &dest_reg, &dest);
3651 mips_block_move_straight (dest, src, MAX_MOVE_BYTES);
3666 mips_block_move_straight (dest, src, leftover);
3673 mips_expand_block_move (rtx dest, rtx src, rtx length)
3679 mips_block_move_straight (dest, src, INTVAL (length));
3684 mips_block_move_loop (dest, src, INTVAL (length));
4559 mips_expand_unaligned_load (rtx dest, rtx src, unsigned int width, int bitpos)
4566 if (GET_CODE (dest) == SUBREG
4567 && GET_MODE (dest) == DImode
4568 && SUBREG_BYTE (dest) == 0
4569 && GET_MODE (SUBREG_REG (dest)) == SImode)
4570 dest = SUBREG_REG (dest);
4574 if (GET_MODE_BITSIZE (GET_MODE (dest)) != width)
4580 temp = gen_reg_rtx (GET_MODE (dest));
4581 if (GET_MODE (dest) == DImode)
4584 emit_insn (gen_mov_ldr (dest, copy_rtx (src), right, temp));
4589 emit_insn (gen_mov_lwr (dest, copy_rtx (src), right, temp));
4599 mips_expand_unaligned_store (rtx dest, rtx src, unsigned int width, int bitpos)
4604 if (!mips_get_unaligned_mem (&dest, width, bitpos, &left, &right))
4612 emit_insn (gen_mov_sdl (dest, src, left));
4613 emit_insn (gen_mov_sdr (copy_rtx (dest), copy_rtx (src), right));
4617 emit_insn (gen_mov_swl (dest, src, left));
4618 emit_insn (gen_mov_swr (copy_rtx (dest), copy_rtx (src), right));