Lines Matching defs:current_frame_info
155 static struct ia64_frame_info current_frame_info;
1973 if (current_frame_info.reg_save_gp)
1974 tmp = gen_rtx_REG (DImode, current_frame_info.reg_save_gp);
1979 offset = (current_frame_info.spill_cfa_off
1980 + current_frame_info.spill_size);
1989 offset = current_frame_info.total_size - offset;
2249 && ((current_frame_info.gr_used_mask >> regno) & 1) == 0)
2251 current_frame_info.gr_used_mask |= 1 << regno;
2258 regno = current_frame_info.n_local_regs;
2264 current_frame_info.n_local_regs = regno + 1;
2276 allocated in current_frame_info.gr_used_mask, since those include regs
2295 && ((current_frame_info.gr_used_mask >> regno) & 1) == 0)
2307 diddle_return_value. Mark REG in current_frame_info.gr_used_mask. */
2317 current_frame_info.gr_used_mask |= 1 << (regno + i);
2339 if (current_frame_info.initialized)
2342 memset (¤t_frame_info, 0, sizeof current_frame_info);
2364 current_frame_info.n_local_regs = regno - LOC_REG (0) + 1;
2373 current_frame_info.n_input_regs = 8;
2379 current_frame_info.n_input_regs = regno - IN_REG (0) + 1;
2395 current_frame_info.n_output_regs = i;
2398 current_frame_info.n_rotate_regs = 0;
2435 current_frame_info.reg_fp = find_gr_spill (1);
2440 if (current_frame_info.reg_fp == 0)
2442 current_frame_info.reg_fp = LOC_REG (79);
2443 current_frame_info.n_local_regs++;
2454 current_frame_info.reg_save_b0 = find_gr_spill (1);
2455 if (current_frame_info.reg_save_b0 == 0)
2463 current_frame_info.reg_save_ar_pfs = find_gr_spill (1);
2464 if (current_frame_info.reg_save_ar_pfs == 0)
2472 current_frame_info.reg_save_gp
2474 if (current_frame_info.reg_save_gp == 0)
2493 current_frame_info.reg_save_ar_pfs = find_gr_spill (1);
2494 if (current_frame_info.reg_save_ar_pfs == 0)
2508 if (current_frame_info.reg_fp != 0
2509 && current_frame_info.reg_save_b0 == current_frame_info.reg_fp + 1
2510 && current_frame_info.reg_save_ar_pfs == current_frame_info.reg_fp + 2)
2512 current_frame_info.reg_save_b0 = current_frame_info.reg_fp;
2513 current_frame_info.reg_save_ar_pfs = current_frame_info.reg_fp + 1;
2514 current_frame_info.reg_fp = current_frame_info.reg_fp + 2;
2524 current_frame_info.reg_save_pr = find_gr_spill (1);
2525 if (current_frame_info.reg_save_pr == 0)
2545 current_frame_info.reg_save_ar_unat = find_gr_spill (spill_size == 0);
2546 if (current_frame_info.reg_save_ar_unat == 0)
2556 current_frame_info.reg_save_ar_lc = find_gr_spill (spill_size == 0);
2557 if (current_frame_info.reg_save_ar_lc == 0)
2582 current_frame_info.total_size = total_size;
2583 current_frame_info.spill_cfa_off = pretend_args_size - 16;
2584 current_frame_info.spill_size = spill_size;
2585 current_frame_info.extra_spill_size = extra_spill_size;
2586 COPY_HARD_REG_SET (current_frame_info.mask, mask);
2587 current_frame_info.n_spilled = n_spilled;
2588 current_frame_info.initialized = reload_completed;
2606 offset = -current_frame_info.total_size;
2608 offset = -(current_frame_info.total_size
2634 offset = (current_frame_info.total_size
2690 spill_fill_data.save_gr_used_mask = current_frame_info.gr_used_mask;
2697 current_frame_info.gr_used_mask |= 1 << regno;
2704 current_frame_info.gr_used_mask = spill_fill_data.save_gr_used_mask;
2850 off = current_frame_info.total_size - cfa_off;
2951 int inputs = current_frame_info.n_input_regs;
2952 int locals = current_frame_info.n_local_regs;
2953 int outputs = current_frame_info.n_output_regs;
2970 if (current_frame_info.reg_fp)
2974 = reg_names[current_frame_info.reg_fp];
2975 reg_names[current_frame_info.reg_fp] = tmp;
2979 if (current_frame_info.n_local_regs == 0
2980 && current_frame_info.n_output_regs == 0
2981 && current_frame_info.n_input_regs <= current_function_args_info.int_regs
2982 && !TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM))
2986 current_frame_info.need_regstk = (TARGET_REG_NAMES != 0);
2991 current_frame_info.need_regstk = 0;
2993 if (current_frame_info.reg_save_ar_pfs)
2994 regno = current_frame_info.reg_save_ar_pfs;
3000 GEN_INT (current_frame_info.n_input_regs),
3001 GEN_INT (current_frame_info.n_local_regs),
3002 GEN_INT (current_frame_info.n_output_regs),
3003 GEN_INT (current_frame_info.n_rotate_regs)));
3004 RTX_FRAME_RELATED_P (insn) = (current_frame_info.reg_save_ar_pfs != 0);
3010 setup_spill_pointers (current_frame_info.n_spilled + n_varargs,
3019 if (current_frame_info.total_size != 0)
3021 rtx frame_size_rtx = GEN_INT (- current_frame_info.total_size);
3024 if (CONST_OK_FOR_I (- current_frame_info.total_size))
3060 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM))
3062 if (current_frame_info.reg_save_ar_unat)
3064 = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_unat);
3069 current_frame_info.gr_used_mask |= 1 << alt_regno;
3074 RTX_FRAME_RELATED_P (insn) = (current_frame_info.reg_save_ar_unat != 0);
3078 if (! epilogue_p && current_frame_info.reg_save_ar_unat)
3096 cfa_off = (current_frame_info.spill_cfa_off
3097 + current_frame_info.spill_size
3098 + current_frame_info.extra_spill_size);
3101 if (TEST_HARD_REG_BIT (current_frame_info.mask, PR_REG (0)))
3104 if (current_frame_info.reg_save_pr != 0)
3106 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_pr);
3133 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM)
3134 && current_frame_info.reg_save_ar_unat == 0)
3144 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM)
3145 && current_frame_info.reg_save_ar_pfs == 0)
3152 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_LC_REGNUM))
3155 if (current_frame_info.reg_save_ar_lc != 0)
3157 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_lc);
3177 if (TEST_HARD_REG_BIT (current_frame_info.mask, BR_REG (0)))
3180 if (current_frame_info.reg_save_b0 != 0)
3182 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_b0);
3201 if (current_frame_info.reg_save_gp)
3204 current_frame_info.reg_save_gp),
3215 gcc_assert (cfa_off == (current_frame_info.spill_cfa_off
3216 + current_frame_info.spill_size));
3220 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3229 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3241 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3249 gcc_assert (cfa_off == current_frame_info.spill_cfa_off);
3273 setup_spill_pointers (current_frame_info.n_spilled,
3276 setup_spill_pointers (current_frame_info.n_spilled, stack_pointer_rtx,
3277 current_frame_info.total_size);
3279 if (current_frame_info.total_size != 0)
3288 cfa_off = (current_frame_info.spill_cfa_off
3289 + current_frame_info.spill_size
3290 + current_frame_info.extra_spill_size);
3293 if (TEST_HARD_REG_BIT (current_frame_info.mask, PR_REG (0)))
3295 if (current_frame_info.reg_save_pr != 0)
3296 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_pr);
3312 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM))
3314 if (current_frame_info.reg_save_ar_unat != 0)
3316 = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_unat);
3321 current_frame_info.gr_used_mask |= 1 << alt_regno;
3329 if (current_frame_info.reg_save_ar_pfs != 0)
3331 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_pfs);
3335 else if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM))
3345 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_LC_REGNUM))
3347 if (current_frame_info.reg_save_ar_lc != 0)
3348 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_lc);
3361 if (TEST_HARD_REG_BIT (current_frame_info.mask, BR_REG (0)))
3363 if (current_frame_info.reg_save_b0 != 0)
3364 alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_b0);
3377 gcc_assert (cfa_off == (current_frame_info.spill_cfa_off
3378 + current_frame_info.spill_size));
3382 if (TEST_HARD_REG_BIT (current_frame_info.mask, GR_REG (1)))
3387 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3396 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3408 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3417 if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM))
3423 gcc_assert (cfa_off == current_frame_info.spill_cfa_off);
3427 if (current_frame_info.total_size || cfun->machine->ia64_eh_epilogue_sp)
3443 else if (current_frame_info.total_size)
3447 frame_size_rtx = GEN_INT (current_frame_info.total_size);
3448 if (CONST_OK_FOR_I (current_frame_info.total_size))
3487 if (current_frame_info.reg_fp && current_frame_info.reg_fp == GR_REG (2))
3497 if (current_frame_info.n_input_regs != 0)
3499 rtx n_inputs = GEN_INT (current_frame_info.n_input_regs);
3518 return (current_frame_info.total_size == 0
3519 && current_frame_info.n_spilled == 0
3520 && current_frame_info.reg_save_b0 == 0
3521 && current_frame_info.reg_save_pr == 0
3522 && current_frame_info.reg_save_ar_pfs == 0
3523 && current_frame_info.reg_save_ar_unat == 0
3524 && current_frame_info.reg_save_ar_lc == 0);
3548 if (TEST_HARD_REG_BIT (current_frame_info.mask, BR_REG (0)))
3550 if (current_frame_info.reg_save_b0 != 0)
3551 src = gen_rtx_REG (DImode, current_frame_info.reg_save_b0);
3559 off = (current_frame_info.spill_cfa_off
3560 + current_frame_info.spill_size);
3562 if (TEST_HARD_REG_BIT (current_frame_info.mask, regno))
3571 off += current_frame_info.total_size;
3596 if (to == current_frame_info.reg_fp
3597 || to == current_frame_info.reg_save_b0
3598 || to == current_frame_info.reg_save_pr
3599 || to == current_frame_info.reg_save_ar_pfs
3600 || to == current_frame_info.reg_save_ar_unat
3601 || to == current_frame_info.reg_save_ar_lc)
3604 if (from == current_frame_info.reg_fp
3605 || from == current_frame_info.reg_save_b0
3606 || from == current_frame_info.reg_save_pr
3607 || from == current_frame_info.reg_save_ar_pfs
3608 || from == current_frame_info.reg_save_ar_unat
3609 || from == current_frame_info.reg_save_ar_lc)
3613 if (OUT_REGNO_P (to) && to >= OUT_REG (current_frame_info.n_output_regs))
3654 if (current_frame_info.need_regstk)
3656 current_frame_info.n_input_regs,
3657 current_frame_info.n_local_regs,
3658 current_frame_info.n_output_regs,
3659 current_frame_info.n_rotate_regs);
3668 if (current_frame_info.reg_save_b0 != 0)
3671 grsave = grsave_prev = current_frame_info.reg_save_b0;
3673 if (current_frame_info.reg_save_ar_pfs != 0
3675 || current_frame_info.reg_save_ar_pfs == grsave_prev + 1))
3679 grsave = current_frame_info.reg_save_ar_pfs;
3680 grsave_prev = current_frame_info.reg_save_ar_pfs;
3682 if (current_frame_info.reg_fp != 0
3684 || current_frame_info.reg_fp == grsave_prev + 1))
3689 grsave_prev = current_frame_info.reg_fp;
3691 if (current_frame_info.reg_save_pr != 0
3693 || current_frame_info.reg_save_pr == grsave_prev + 1))
3697 grsave = current_frame_info.reg_save_pr;
3708 if (current_frame_info.spill_cfa_off != -16)
3710 (long) (current_frame_info.spill_cfa_off
3711 + current_frame_info.spill_size));
3733 if (current_frame_info.reg_fp)
3737 = reg_names[current_frame_info.reg_fp];
3738 reg_names[current_frame_info.reg_fp] = tmp;
3742 for (i = 0; i < current_frame_info.n_input_regs; i++)
3744 for (i = 0; i < current_frame_info.n_local_regs; i++)
3746 for (i = 0; i < current_frame_info.n_output_regs; i++)
3750 current_frame_info.initialized = 0;
3759 if (current_frame_info.reg_fp)
3762 regno = current_frame_info.reg_fp;
3763 else if (regno == current_frame_info.reg_fp)
3770 return 32 + current_frame_info.n_input_regs + regno - LOC_REG (0);
3772 return (32 + current_frame_info.n_input_regs
3773 + current_frame_info.n_local_regs + regno - OUT_REG (0));
8647 if (current_frame_info.reg_save_b0
8648 && regno == current_frame_info.reg_save_b0)
8650 if (current_frame_info.reg_save_pr
8651 && regno == current_frame_info.reg_save_pr)
8653 if (current_frame_info.reg_save_ar_pfs
8654 && regno == current_frame_info.reg_save_ar_pfs)
8656 if (current_frame_info.reg_save_ar_unat
8657 && regno == current_frame_info.reg_save_ar_unat)
8659 if (current_frame_info.reg_save_ar_lc
8660 && regno == current_frame_info.reg_save_ar_lc)
8816 if (dest_regno == current_frame_info.reg_save_ar_pfs)
8830 if (current_frame_info.total_size == 0 && !frame_pointer_needed)
8881 gcc_assert (dest_regno == current_frame_info.reg_save_b0);
8888 gcc_assert (dest_regno == current_frame_info.reg_save_pr);
8895 gcc_assert (dest_regno == current_frame_info.reg_save_ar_unat);
8902 gcc_assert (dest_regno == current_frame_info.reg_save_ar_lc);
8959 gcc_assert (!current_frame_info.reg_save_b0);
8965 gcc_assert (!current_frame_info.reg_save_pr);
8971 gcc_assert (!current_frame_info.reg_save_ar_lc);
8977 gcc_assert (!current_frame_info.reg_save_ar_pfs);
8983 gcc_assert (!current_frame_info.reg_save_ar_unat);
9444 memset (¤t_frame_info, 0, sizeof (current_frame_info));
9445 current_frame_info.spill_cfa_off = -16;
9446 current_frame_info.n_input_regs = 1;
9447 current_frame_info.need_regstk = (TARGET_REG_NAMES != 0);