x86/cpufreq/powernow.c

148 #define WRITE_FIDVID(fid, vid, ctrl)	\
150 	    (((ctrl) << 32) | (1ULL << 16) | ((vid) << 8) | (fid)))
155 #define FID_TO_VCO_FID(fid)	\
156 	(((fid) < 8) ? (8 + ((fid) << 1)) : (fid))
212 	int fid;
277 pn7_setfidvid(struct pn_softc *sc, int fid, int vid)
287 	if (fid == cfid && vid == cvid)
292 	ctl |= PN7_CTR_FID(fid);
299 	if (pn7_fid_to_mult[fid] < pn7_fid_to_mult[cfid]) {
305 		if (fid != cfid)
328 pn8_write_fidvid(u_int fid, u_int vid, uint64_t ctrl, uint64_t *status)
333 		WRITE_FIDVID(fid, vid, ctrl);
340 pn8_setfidvid(struct pn_softc *sc, int fid, int vid)
355 	if (fid == cfid && vid == cvid)
388 	if (cfid != fid) {
391 		vco_fid = FID_TO_VCO_FID(fid);
396 			if (fid > cfid) {
416 		rv = pn8_write_fidvid(fid, cvid,
435 	if (cfid != fid || cvid != vid)
445 	int fid, vid;
460 	fid = sc->powernow_states[i].fid;
467 		rv = pn7_setfidvid(sc, fid, vid);
470 		rv = pn8_setfidvid(sc, fid, vid);
504 		if (cfid == sc->powernow_states[i].fid &&
557  * Given a set of pair of fid/vid, and number of performance states,
570 		state.fid = *p++;
576 			state.freq = 100 * pn7_fid_to_mult[state.fid] * sc->fsb;
578 			    (pn7_fid_to_mult[state.fid] % 10) == 5)
582 			state.freq = 100 * pn8_fid_to_mult[state.fid] * sc->fsb;
606 			int fid = sc->powernow_states[i].fid;
612 			    fid,
799 			state.fid = ACPI_PN7_CTRL_TO_FID(ctrl);
802 			    (pn7_fid_to_mult[state.fid] % 10) == 5)
806 			state.fid = ACPI_PN8_CTRL_TO_FID(ctrl);
838 		if (PN7_STA_MFID(status) != state.fid) {
842 		sc->fsb = state.freq / 100 / pn7_fid_to_mult[state.fid];
856 		    (sc->powernow_states[sc->powernow_max_states - 2].fid < 8))
858 		sc->fsb = state.freq / 100 / pn8_fid_to_mult[state.fid];