Lines Matching defs:vdev
100 vxge_dev_t *vdev;
108 vdev = (vxge_dev_t *) device_get_softc(ndev);
109 if (!vdev)
112 bzero(vdev, sizeof(vxge_dev_t));
114 vdev->ndev = ndev;
115 strlcpy(vdev->ndev_name, "vxge", sizeof(vdev->ndev_name));
117 err = vxge_driver_config(vdev);
122 status = vxge_driver_init(vdev);
124 device_printf(vdev->ndev, "Failed to initialize driver\n");
131 err = vxge_alloc_resources(vdev);
133 device_printf(vdev->ndev, "resource allocation failed\n");
137 err = vxge_device_hw_info_get(vdev);
144 vxge_hal_device_config_default_get(vdev->device_config);
147 vxge_vpath_config(vdev);
150 err = vxge_alloc_isr_resources(vdev);
153 device_printf(vdev->ndev, "isr resource allocation failed\n");
158 device_attr.bar0 = (u8 *) vdev->pdev->bar_info[0];
159 device_attr.bar1 = (u8 *) vdev->pdev->bar_info[1];
160 device_attr.bar2 = (u8 *) vdev->pdev->bar_info[2];
161 device_attr.regh0 = (vxge_bus_res_t *) vdev->pdev->reg_map[0];
162 device_attr.regh1 = (vxge_bus_res_t *) vdev->pdev->reg_map[1];
163 device_attr.regh2 = (vxge_bus_res_t *) vdev->pdev->reg_map[2];
164 device_attr.irqh = (pci_irq_h) vdev->config.isr_info[0].irq_handle;
165 device_attr.cfgh = vdev->pdev;
166 device_attr.pdev = vdev->pdev;
170 &device_attr, vdev->device_config);
173 device_printf(vdev->ndev, "hal device initialization failed\n");
177 vdev->devh = hldev;
178 vxge_hal_device_private_set(hldev, vdev);
180 if (vdev->is_privilaged) {
181 err = vxge_firmware_verify(vdev);
190 vdev->vpaths = (vxge_vpath_t *)
191 vxge_mem_alloc(vdev->no_of_vpath * sizeof(vxge_vpath_t));
193 if (vdev->vpaths == NULL) {
195 device_printf(vdev->ndev, "vpath memory allocation failed\n");
199 vdev->no_of_func = 1;
200 if (vdev->is_privilaged) {
202 vxge_hal_func_mode_count(vdev->devh,
203 vdev->config.hw_info.function_mode, &vdev->no_of_func);
205 vxge_bw_priority_config(vdev);
209 vxge_mutex_init(vdev);
212 vxge_media_init(vdev);
217 device_printf(vdev->ndev, "setting up interface failed\n");
221 err = vxge_isr_setup(vdev);
224 device_printf(vdev->ndev,
228 vxge_device_hw_info_print(vdev);
229 vdev->is_active = TRUE;
247 vxge_dev_t *vdev;
249 vdev = (vxge_dev_t *) device_get_softc(ndev);
250 if (vdev->is_active) {
251 vdev->is_active = FALSE;
252 vxge_stop(vdev);
266 vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
267 vxge_stop(vdev);
278 vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
280 VXGE_DRV_LOCK(vdev);
281 vxge_init_locked(vdev);
282 VXGE_DRV_UNLOCK(vdev);
290 vxge_init_locked(vxge_dev_t *vdev)
293 vxge_hal_device_t *hldev = vdev->devh;
297 ifnet_t ifp = vdev->ifp;
303 VXGE_DRV_LOCK_ASSERT(vdev);
306 err = vxge_vpath_open(vdev);
310 if (vdev->config.rth_enable) {
311 status = vxge_rth_config(vdev);
316 for (i = 0; i < vdev->no_of_vpath; i++) {
317 vpath_handle = vxge_vpath_handle_get(vdev, i);
324 device_printf(vdev->ndev,
331 device_printf(vdev->ndev,
340 device_printf(vdev->ndev, "failed to enable device\n");
344 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX)
345 vxge_msix_enable(vdev);
355 for (i = 0; i < vdev->no_of_vpath; i++) {
356 vpath_handle = vxge_vpath_handle_get(vdev, i);
366 device_printf(vdev->ndev,
371 vxge_hal_device_intr_enable(vdev->devh);
373 for (i = 0; i < vdev->no_of_vpath; i++) {
374 vpath_handle = vxge_vpath_handle_get(vdev, i);
378 bzero(&(vdev->vpaths[i].driver_stats),
388 vdev->is_initialized = TRUE;
397 vxge_hal_device_intr_disable(vdev->devh);
401 vxge_vpath_close(vdev);
412 vxge_driver_init(vxge_dev_t *vdev)
432 device_printf(vdev->ndev,
448 vxge_driver_config(vxge_dev_t *vdev)
455 VXGE_GET_PARAM("hint.vxge.0.no_of_vpath", vdev->config,
458 if (vdev->config.no_of_vpath == VXGE_DEFAULT_USER_HARDCODED)
459 vdev->config.no_of_vpath = mp_ncpus;
461 if (vdev->config.no_of_vpath <= 0) {
463 device_printf(vdev->ndev,
469 VXGE_GET_PARAM("hint.vxge.0.intr_coalesce", vdev->config,
472 VXGE_GET_PARAM("hint.vxge.0.rth_enable", vdev->config,
475 VXGE_GET_PARAM("hint.vxge.0.rth_bkt_sz", vdev->config,
478 VXGE_GET_PARAM("hint.vxge.0.lro_enable", vdev->config,
481 VXGE_GET_PARAM("hint.vxge.0.tso_enable", vdev->config,
484 VXGE_GET_PARAM("hint.vxge.0.tx_steering", vdev->config,
487 VXGE_GET_PARAM("hint.vxge.0.msix_enable", vdev->config,
490 VXGE_GET_PARAM("hint.vxge.0.ifqmaxlen", vdev->config,
493 VXGE_GET_PARAM("hint.vxge.0.port_mode", vdev->config,
496 if (vdev->config.port_mode == VXGE_DEFAULT_USER_HARDCODED)
497 vdev->config.port_mode = VXGE_DEFAULT_CONFIG_VALUE;
499 VXGE_GET_PARAM("hint.vxge.0.l2_switch", vdev->config,
502 if (vdev->config.l2_switch == VXGE_DEFAULT_USER_HARDCODED)
503 vdev->config.l2_switch = VXGE_DEFAULT_CONFIG_VALUE;
505 VXGE_GET_PARAM("hint.vxge.0.fw_upgrade", vdev->config,
508 VXGE_GET_PARAM("hint.vxge.0.low_latency", vdev->config,
511 VXGE_GET_PARAM("hint.vxge.0.func_mode", vdev->config,
514 if (vdev->config.function_mode == VXGE_DEFAULT_USER_HARDCODED)
515 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
517 if (!(is_multi_func(vdev->config.function_mode) ||
518 is_single_func(vdev->config.function_mode)))
519 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
539 vxge_os_memcpy(&vdev->config.bw_info[i], &bw_info,
551 vxge_stop(vxge_dev_t *vdev)
553 VXGE_DRV_LOCK(vdev);
554 vxge_stop_locked(vdev);
555 VXGE_DRV_UNLOCK(vdev);
564 vxge_stop_locked(vxge_dev_t *vdev)
568 vxge_hal_device_t *hldev = vdev->devh;
569 ifnet_t ifp = vdev->ifp;
571 VXGE_DRV_LOCK_ASSERT(vdev);
578 vdev->is_initialized = FALSE;
590 device_printf(vdev->ndev,
595 vxge_vpath_reset(vdev);
600 vxge_vpath_close(vdev);
607 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
609 vpath = &(vdev->vpaths[0]);
623 vxge_dev_t *vdev = vpath->vdev;
627 if ((!vdev->is_initialized) ||
659 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
661 if (vdev->config.tx_steering) {
662 i = vxge_vpath_get(vdev, m_head);
664 i = m_head->m_pkthdr.flowid % vdev->no_of_vpath;
667 vpath = &(vdev->vpaths[i]);
682 vxge_dev_t *vdev = vpath->vdev;
686 if ((!vdev->is_initialized) ||
735 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
737 for (i = 0; i < vdev->no_of_vpath; i++) {
738 vpath = &(vdev->vpaths[i]);
765 vxge_dev_t *vdev = vpath->vdev;
847 if ((vxge_hal_device_check_id(vdev->devh) == VXGE_HAL_CARD_TITAN_1A) &&
848 (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)))
890 vxge_dev_t *vdev = vpath->vdev;
892 ifnet_t ifp = vdev->ifp;
904 device_printf(vdev->ndev, "tx transfer code %d\n",
997 vxge_dev_t *vdev = vpath->vdev;
1003 ifnet_t ifp = vdev->ifp;
1193 vxge_dev_t *vdev = vpath->vdev;
1195 mbuf_pkt = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, vdev->rx_mbuf_sz);
1199 device_printf(vdev->ndev, "out of memory to allocate mbuf\n");
1204 mbuf_pkt->m_len = vdev->rx_mbuf_sz;
1205 mbuf_pkt->m_pkthdr.len = vdev->rx_mbuf_sz;
1206 mbuf_pkt->m_pkthdr.rcvif = vdev->ifp;
1234 vxge_hal_ring_rxd_1b_set(rxdh, rxd_priv->dma_addr[0], vdev->rx_mbuf_sz);
1252 vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1253 hw_info = &vdev->config.hw_info;
1255 ifnet_t ifp = vdev->ifp;
1257 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1258 for (i = 0; i < vdev->no_of_vpath; i++) {
1259 vpath = &(vdev->vpaths[i]);
1265 if (vdev->is_privilaged && (hw_info->ports > 1)) {
1266 vxge_active_port_update(vdev);
1267 device_printf(vdev->ndev,
1268 "Active Port : %lld\n", vdev->active_port);
1285 vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1287 ifnet_t ifp = vdev->ifp;
1289 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1290 for (i = 0; i < vdev->no_of_vpath; i++) {
1291 vpath = &(vdev->vpaths[i]);
1305 vxge_reset(vxge_dev_t *vdev)
1307 if (!vdev->is_initialized)
1310 VXGE_DRV_LOCK(vdev);
1311 vxge_stop_locked(vdev);
1312 vxge_init_locked(vdev);
1313 VXGE_DRV_UNLOCK(vdev);
1325 vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1326 ifnet_t ifp = vdev->ifp;
1332 vxge_hal_device_intr_disable(vdev->devh);
1350 vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
1353 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
1356 if (j >= vdev->no_of_vpath)
1359 vdev->vpaths[j].vp_id = i;
1360 vdev->vpaths[j].vp_index = j;
1361 vdev->vpaths[j].vdev = vdev;
1362 vdev->vpaths[j].is_configured = TRUE;
1364 vxge_os_memcpy((u8 *) vdev->vpaths[j].mac_addr,
1365 (u8 *) (vdev->config.hw_info.mac_addrs[i]),
1373 device_printf(vdev->ndev,
1378 vdev->ifp = ifp;
1385 ifp->if_softc = vdev;
1394 ifp->if_snd.ifq_drv_maxlen = max(vdev->config.ifq_maxlen, ifqmaxlen);
1404 if (vdev->config.tso_enable)
1405 vxge_tso_config(vdev);
1407 if (vdev->config.lro_enable)
1412 strlcpy(vdev->ndev_name, device_get_nameunit(ndev),
1413 sizeof(vdev->ndev_name));
1416 ether_ifattach(ifp, vdev->vpaths[0].mac_addr);
1427 vxge_isr_setup(vxge_dev_t *vdev)
1435 switch (vdev->config.intr_mode) {
1437 err = bus_setup_intr(vdev->ndev,
1438 vdev->config.isr_info[0].irq_res,
1440 vxge_isr_filter, vxge_isr_line, vdev,
1441 &vdev->config.isr_info[0].irq_handle);
1445 for (i = 0; i < vdev->intr_count; i++) {
1447 irq_rid = vdev->config.isr_info[i].irq_rid;
1448 vpath = &vdev->vpaths[irq_rid / 4];
1459 err = bus_setup_intr(vdev->ndev,
1460 vdev->config.isr_info[i].irq_res,
1463 &vdev->config.isr_info[i].irq_handle);
1471 bus_teardown_intr(vdev->ndev,
1472 vdev->config.isr_info[i].irq_res,
1473 vdev->config.isr_info[i].irq_handle);
1489 vxge_dev_t *vdev = (vxge_dev_t *) handle;
1490 __hal_device_t *hldev = (__hal_device_t *) vdev->devh;
1495 val64 = vxge_os_pio_mem_read64(vdev->pdev, (vdev->devh)->regh0,
1508 vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
1510 vxge_hal_device_handle_irq(vdev->devh, 0);
1521 vxge_dev_t *vdev = vpath->vdev;
1525 VXGE_HAL_DEVICE_STATS_SW_INFO_TRAFFIC_INTR(vdev->devh);
1548 vxge_dev_t *vdev = vpath->vdev;
1550 VXGE_HAL_DEVICE_STATS_SW_INFO_NOT_TRAFFIC_INTR(vdev->devh);
1553 for (i = 0; i < vdev->no_of_vpath; i++) {
1555 vpath = &(vdev->vpaths[i]);
1561 device_printf(vdev->ndev,
1566 vdev->is_initialized = FALSE;
1578 vxge_msix_enable(vxge_dev_t *vdev)
1591 for (i = 0; i < vdev->no_of_vpath; i++) {
1593 vpath = vdev->vpaths + i;
1594 first_vp_id = vdev->vpaths[0].vp_id;
1606 device_printf(vdev->ndev,
1624 vxge_media_init(vxge_dev_t *vdev)
1626 ifmedia_init(&vdev->media,
1630 ifmedia_add(&vdev->media,
1631 IFM_ETHER | vdev->ifm_optics | IFM_FDX,
1635 ifmedia_add(&vdev->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1636 ifmedia_set(&vdev->media, IFM_ETHER | IFM_AUTO);
1646 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1647 vxge_hal_device_t *hldev = vdev->devh;
1655 ifmr->ifm_active |= vdev->ifm_optics | IFM_FDX;
1667 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1668 struct ifmedia *ifmediap = &vdev->media;
1677 vxge_alloc_resources(vxge_dev_t *vdev)
1683 device_t ndev = vdev->ndev;
1686 vdev->device_config = (vxge_hal_device_config_t *)
1689 if (!vdev->device_config) {
1692 device_printf(vdev->ndev,
1702 device_printf(vdev->ndev,
1707 vdev->pdev = pci_info;
1709 err = vxge_alloc_bar_resources(vdev, 0);
1715 err = vxge_alloc_bar_resources(vdev, 1);
1721 err = vxge_alloc_bar_resources(vdev, 2);
1737 vxge_alloc_bar_resources(vxge_dev_t *vdev, int i)
1741 vxge_pci_info_t *pci_info = vdev->pdev;
1746 bus_alloc_resource_any(vdev->ndev,
1750 device_printf(vdev->ndev,
1760 device_printf(vdev->ndev,
1786 vxge_alloc_isr_resources(vxge_dev_t *vdev)
1793 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1795 intr_count = pci_msix_count(vdev->ndev);
1798 msix_vec_reqd = 4 * vdev->no_of_vpath;
1802 err = pci_alloc_msix(vdev->ndev, &intr_count);
1808 device_printf(vdev->ndev, "Unable to allocate "
1815 vdev->intr_count = 0;
1816 vdev->config.intr_mode = intr_mode;
1818 switch (vdev->config.intr_mode) {
1820 vdev->config.isr_info[0].irq_rid = 0;
1821 vdev->config.isr_info[0].irq_res =
1822 bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1823 &vdev->config.isr_info[0].irq_rid,
1826 if (vdev->config.isr_info[0].irq_res == NULL) {
1827 device_printf(vdev->ndev,
1832 vdev->intr_count++;
1837 for (i = 0; i < vdev->no_of_vpath; i++) {
1840 vdev->config.isr_info[msix_count].irq_rid = irq_rid + 2;
1841 vdev->config.isr_info[msix_count].irq_res =
1842 bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1843 &vdev->config.isr_info[msix_count].irq_rid,
1846 if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1847 device_printf(vdev->ndev,
1849 vdev->config.isr_info[msix_count].irq_rid);
1854 vdev->intr_count++;
1855 err = bus_bind_intr(vdev->ndev,
1856 vdev->config.isr_info[msix_count].irq_res,
1864 vdev->config.isr_info[msix_count].irq_rid = 3;
1865 vdev->config.isr_info[msix_count].irq_res =
1866 bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1867 &vdev->config.isr_info[msix_count].irq_rid,
1870 if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1871 device_printf(vdev->ndev,
1873 vdev->config.isr_info[msix_count].irq_rid);
1878 vdev->intr_count++;
1879 err = bus_bind_intr(vdev->ndev,
1880 vdev->config.isr_info[msix_count].irq_res, (i % mp_ncpus));
1885 vdev->device_config->intr_mode = vdev->config.intr_mode;
1899 vxge_dev_t *vdev;
1901 vdev = (vxge_dev_t *) device_get_softc(ndev);
1905 for (i = 0; i < vdev->intr_count; i++) {
1907 vdev->config.isr_info[i].irq_res,
1908 vdev->config.isr_info[i].irq_handle);
1913 ether_ifdetach(vdev->ifp);
1915 if_free(vdev->ifp);
1919 ifmedia_removeall(&vdev->media);
1923 vxge_mutex_destroy(vdev);
1927 vxge_mem_free(vdev->vpaths,
1928 vdev->no_of_vpath * sizeof(vxge_vpath_t));
1932 if (vdev->devh != NULL) {
1933 vxge_hal_device_private_set(vdev->devh, 0);
1934 vxge_hal_device_terminate(vdev->devh);
1939 vxge_free_isr_resources(vdev);
1943 vxge_free_bar_resources(vdev, 2);
1947 vxge_free_bar_resources(vdev, 1);
1951 vxge_free_bar_resources(vdev, 0);
1955 vxge_mem_free(vdev->pdev, sizeof(vxge_pci_info_t));
1959 vxge_mem_free(vdev->device_config,
1983 vxge_free_isr_resources(vxge_dev_t *vdev)
1987 switch (vdev->config.intr_mode) {
1989 if (vdev->config.isr_info[0].irq_res) {
1990 bus_release_resource(vdev->ndev, SYS_RES_IRQ,
1991 vdev->config.isr_info[0].irq_rid,
1992 vdev->config.isr_info[0].irq_res);
1994 vdev->config.isr_info[0].irq_res = NULL;
1999 for (i = 0; i < vdev->intr_count; i++) {
2000 if (vdev->config.isr_info[i].irq_res) {
2001 bus_release_resource(vdev->ndev, SYS_RES_IRQ,
2002 vdev->config.isr_info[i].irq_rid,
2003 vdev->config.isr_info[i].irq_res);
2005 vdev->config.isr_info[i].irq_res = NULL;
2009 if (vdev->intr_count)
2010 pci_release_msi(vdev->ndev);
2017 vxge_free_bar_resources(vxge_dev_t *vdev, int i)
2020 vxge_pci_info_t *pci_info = vdev->pdev;
2025 bus_release_resource(vdev->ndev, SYS_RES_MEMORY,
2036 vxge_mutex_init(vxge_dev_t *vdev)
2040 snprintf(vdev->mtx_drv_name, sizeof(vdev->mtx_drv_name),
2041 "%s_drv", vdev->ndev_name);
2043 mtx_init(&vdev->mtx_drv, vdev->mtx_drv_name,
2046 for (i = 0; i < vdev->no_of_vpath; i++) {
2047 snprintf(vdev->vpaths[i].mtx_tx_name,
2048 sizeof(vdev->vpaths[i].mtx_tx_name), "%s_tx_%d",
2049 vdev->ndev_name, i);
2051 mtx_init(&vdev->vpaths[i].mtx_tx,
2052 vdev->vpaths[i].mtx_tx_name, NULL, MTX_DEF);
2061 vxge_mutex_destroy(vxge_dev_t *vdev)
2065 for (i = 0; i < vdev->no_of_vpath; i++)
2066 VXGE_TX_LOCK_DESTROY(&(vdev->vpaths[i]));
2068 VXGE_DRV_LOCK_DESTROY(vdev);
2075 vxge_rth_config(vxge_dev_t *vdev)
2084 vdev->config.rth_bkt_sz = VXGE_DEFAULT_RTH_BUCKET_SIZE;
2086 for (i = 0; i < (1 << vdev->config.rth_bkt_sz); i++)
2087 mtable[i] = i % vdev->no_of_vpath;
2098 status = vxge_hal_vpath_rts_rth_itable_set(vdev->vpath_handles,
2099 vdev->no_of_vpath, mtable,
2100 ((u32) (1 << vdev->config.rth_bkt_sz)));
2103 device_printf(vdev->ndev, "rth configuration failed\n");
2106 for (i = 0; i < vdev->no_of_vpath; i++) {
2107 vpath_handle = vxge_vpath_handle_get(vdev, i);
2113 &hash_types, vdev->config.rth_bkt_sz, TRUE);
2115 device_printf(vdev->ndev,
2117 vdev->vpaths[i].vp_id);
2131 vxge_vpath_config(vxge_dev_t *vdev)
2136 vxge_hal_device_config_t *device_config = vdev->device_config;
2142 vdev->config.no_of_vpath =
2143 min(vdev->config.no_of_vpath, vdev->max_supported_vpath);
2152 if (no_of_vpath >= vdev->config.no_of_vpath)
2155 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
2228 vdev->no_of_vpath = no_of_vpath;
2230 if (vdev->no_of_vpath == 1)
2231 vdev->config.tx_steering = 0;
2233 if (vdev->config.rth_enable && (vdev->no_of_vpath > 1)) {
2238 vdev->config.rth_enable = device_config->rth_en;
2258 vxge_vpath_open(vxge_dev_t *vdev)
2270 for (i = 0; i < vdev->no_of_vpath; i++) {
2272 vpath = &(vdev->vpaths[i]);
2292 device_printf(vdev->ndev,
2304 status = vxge_hal_vpath_open(vdev->devh, &vpath_attr,
2308 device_printf(vdev->ndev,
2314 vdev->vpath_handles[i] = vpath->handle;
2322 vpath->tx_intr_coalesce = vdev->config.intr_coalesce;
2323 vpath->rx_intr_coalesce = vdev->config.intr_coalesce;
2325 func_id = vdev->config.hw_info.func_id;
2327 if (vdev->config.low_latency &&
2328 (vdev->config.bw_info[func_id].priority ==
2333 if (vdev->ifp->if_capenable & IFCAP_LRO) {
2336 device_printf(vdev->ndev,
2341 lro->ifp = vdev->ifp;
2349 vxge_tso_config(vxge_dev_t *vdev)
2354 vdev->ifp->if_capabilities |= IFCAP_TSO4;
2356 status = vxge_bw_priority_get(vdev, NULL);
2359 func_id = vdev->config.hw_info.func_id;
2360 priority = vdev->config.bw_info[func_id].priority;
2363 vdev->ifp->if_capabilities &= ~IFCAP_TSO4;
2367 if (vdev->ifp->if_capabilities & IFCAP_TSO4)
2368 vdev->ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
2374 vxge_bw_priority_get(vxge_dev_t *vdev, vxge_bw_info_t *bw_info)
2382 func_id = vdev->config.hw_info.func_id;
2385 func_mode = vdev->config.hw_info.function_mode;
2390 if (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)) {
2392 status = vxge_hal_vf_rx_bw_get(vdev->devh,
2397 status = vxge_hal_get_vpath_list(vdev->devh,
2401 status = vxge_hal_bw_priority_get(vdev->devh,
2411 vdev->config.bw_info[func_id].priority = priority;
2412 vdev->config.bw_info[func_id].bandwidth = bandwidth;
2423 vxge_vpath_close(vxge_dev_t *vdev)
2428 for (i = 0; i < vdev->no_of_vpath; i++) {
2430 vpath = &(vdev->vpaths[i]);
2460 vxge_vpath_reset(vxge_dev_t *vdev)
2466 for (i = 0; i < vdev->no_of_vpath; i++) {
2467 vpath_handle = vxge_vpath_handle_get(vdev, i);
2473 device_printf(vdev->ndev,
2479 vxge_vpath_get(vxge_dev_t *vdev, mbuf_t mhead)
2494 queue_len = vdev->no_of_vpath;
2553 vxge_vpath_handle_get(vxge_dev_t *vdev, int i)
2555 return (vdev->vpaths[i].is_open ? vdev->vpaths[i].handle : NULL);
2559 vxge_firmware_verify(vxge_dev_t *vdev)
2565 if (vdev->fw_upgrade) {
2566 status = vxge_firmware_upgrade(vdev);
2573 if ((vdev->config.function_mode != VXGE_DEFAULT_CONFIG_VALUE) &&
2574 (vdev->config.hw_info.function_mode !=
2575 (u64) vdev->config.function_mode)) {
2577 status = vxge_func_mode_set(vdev);
2584 status = vxge_hal_get_active_config(vdev->devh,
2589 vdev->l2_switch = active_config;
2590 if (vdev->config.l2_switch != VXGE_DEFAULT_CONFIG_VALUE) {
2591 if (vdev->config.l2_switch != active_config) {
2592 status = vxge_l2switch_mode_set(vdev);
2599 if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
2600 if (vxge_port_mode_update(vdev) == ENXIO)
2606 device_printf(vdev->ndev, "PLEASE POWER CYCLE THE SYSTEM\n");
2612 vxge_firmware_upgrade(vxge_dev_t *vdev)
2619 hw_info = &vdev->config.hw_info;
2624 device_printf(vdev->ndev, "Current firmware version : %s (%s)\n",
2627 device_printf(vdev->ndev, "Upgrading firmware to %d.%d.%d\n",
2632 status = vxge_hal_mrpcim_fw_upgrade(vdev->pdev,
2633 (pci_reg_h) vdev->pdev->reg_map[0],
2634 (u8 *) vdev->pdev->bar_info[0],
2637 device_printf(vdev->ndev, "firmware upgrade %s\n",
2644 vxge_func_mode_set(vxge_dev_t *vdev)
2649 status = vxge_hal_mrpcim_pcie_func_mode_set(vdev->devh,
2650 vdev->config.function_mode);
2651 device_printf(vdev->ndev,
2656 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2660 vxge_hal_get_active_config(vdev->devh,
2668 if (((is_multi_func(vdev->config.hw_info.function_mode)) &&
2669 is_single_func(vdev->config.function_mode)) &&
2671 vdev->config.port_mode =
2674 status = vxge_port_mode_set(vdev);
2681 vxge_port_mode_set(vxge_dev_t *vdev)
2685 status = vxge_hal_set_port_mode(vdev->devh, vdev->config.port_mode);
2686 device_printf(vdev->ndev,
2691 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2696 if (vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) {
2698 status = vxge_hal_config_vpath_map(vdev->devh,
2701 device_printf(vdev->ndev, "dual port map change %s\n",
2709 vxge_port_mode_update(vxge_dev_t *vdev)
2715 if ((vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) &&
2716 is_single_func(vdev->config.hw_info.function_mode)) {
2718 device_printf(vdev->ndev,
2725 status = vxge_hal_get_active_config(vdev->devh,
2733 vdev->port_mode = active_config;
2734 if (vdev->config.port_mode != VXGE_DEFAULT_CONFIG_VALUE) {
2735 if (vdev->config.port_mode != vdev->port_mode) {
2736 status = vxge_port_mode_set(vdev);
2742 vdev->port_mode = vdev->config.port_mode;
2747 status = vxge_hal_get_active_config(vdev->devh,
2755 vdev->port_failure = active_config;
2761 if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT)
2762 vdev->config.port_failure =
2765 else if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_ACTIVE_PASSIVE)
2766 vdev->config.port_failure =
2769 if ((vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT) &&
2770 (vdev->config.port_failure != vdev->port_failure)) {
2771 status = vxge_port_behavior_on_failure_set(vdev);
2781 vxge_port_mode_get(vxge_dev_t *vdev, vxge_port_info_t *port_info)
2788 status = vxge_hal_get_active_config(vdev->devh,
2800 status = vxge_hal_get_active_config(vdev->devh,
2815 vxge_port_behavior_on_failure_set(vxge_dev_t *vdev)
2819 status = vxge_hal_set_behavior_on_failure(vdev->devh,
2820 vdev->config.port_failure);
2822 device_printf(vdev->ndev,
2827 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2835 vxge_active_port_update(vxge_dev_t *vdev)
2841 status = vxge_hal_get_active_config(vdev->devh,
2846 vdev->active_port = active_config;
2850 vxge_l2switch_mode_set(vxge_dev_t *vdev)
2854 status = vxge_hal_set_l2switch_mode(vdev->devh,
2855 vdev->config.l2_switch);
2857 device_printf(vdev->ndev, "L2 switch %s\n",
2859 (vdev->config.l2_switch) ? "enable" : "disable" :
2863 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2875 vxge_promisc_set(vxge_dev_t *vdev)
2881 if (!vdev->is_initialized)
2884 ifp = vdev->ifp;
2886 for (i = 0; i < vdev->no_of_vpath; i++) {
2887 vpath_handle = vxge_vpath_handle_get(vdev, i);
2903 vxge_change_mtu(vxge_dev_t *vdev, unsigned long new_mtu)
2910 (vdev->ifp)->if_mtu = new_mtu;
2911 device_printf(vdev->ndev, "MTU changed to %ld\n", (vdev->ifp)->if_mtu);
2913 if (vdev->is_initialized) {
2914 if_down(vdev->ifp);
2915 vxge_reset(vdev);
2916 if_up(vdev->ifp);
2932 vxge_dev_t *vdev = vpath->vdev;
2933 ifnet_t ifp = vdev->ifp;
2941 vdev->rx_mbuf_sz = MCLBYTES;
2943 vdev->rx_mbuf_sz =
2950 bus_get_dma_tag(vdev->ndev),
2969 bus_get_dma_tag(vdev->ndev),
2976 vdev->rx_mbuf_sz,
2978 vdev->rx_mbuf_sz,
3028 vxge_device_hw_info_get(vxge_dev_t *vdev)
3039 status = vxge_hal_device_hw_info_get(vdev->pdev,
3040 (pci_reg_h) vdev->pdev->reg_map[0],
3041 (u8 *) vdev->pdev->bar_info[0],
3042 &vdev->config.hw_info);
3047 hw_info = &vdev->config.hw_info;
3051 device_printf(vdev->ndev, "No vpaths available in device\n");
3055 fw_option = vdev->config.fw_option;
3064 vdev->max_supported_vpath = max_supported_vpath;
3067 vdev->is_privilaged = (status == VXGE_HAL_OK) ? TRUE : FALSE;
3069 vdev->hw_fw_version = VXGE_FW_VERSION(
3079 (vdev->hw_fw_version != VXGE_DRV_FW_VERSION)) {
3083 ((vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 1)) &&
3088 if (vdev->hw_fw_version < VXGE_BASE_FW_VERSION) {
3089 device_printf(vdev->ndev,
3094 vdev->fw_upgrade = TRUE;
3109 vxge_device_hw_info_print(vxge_dev_t *vdev)
3121 hldev = vdev->devh;
3122 ndev = vdev->ndev;
3127 hw_info = &(vdev->config.hw_info);
3129 snprintf(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3130 sizeof(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]),
3135 snprintf(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3136 sizeof(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]),
3149 snprintf(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3150 sizeof(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]),
3153 snprintf(vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3154 sizeof(vdev->config.nic_attr[VXGE_PRINT_PART_NO]),
3157 snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3158 sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]),
3161 snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3162 sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_DATE]),
3168 vxge_pmd_port_type_get(vdev, pmd_port->type,
3171 strncpy(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3173 sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]));
3187 snprintf(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3188 sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]),
3198 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3199 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3201 vdev->max_supported_vpath, "VPath(s)/function");
3205 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3206 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3208 vdev->max_supported_vpath, "VPath(s)/function");
3212 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3213 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3215 vdev->max_supported_vpath, "VPath(s)/function");
3219 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3220 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3222 vdev->max_supported_vpath, "VPath(s)/function");
3226 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3227 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3229 vdev->max_supported_vpath, "VPath(s)/function");
3233 snprintf(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3234 sizeof(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]),
3235 "%s", ((vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) ?
3238 snprintf(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3239 sizeof(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]),
3240 "%d", vdev->no_of_vpath);
3242 snprintf(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE],
3243 sizeof(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]),
3244 "%lu", vdev->ifp->if_mtu);
3246 snprintf(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3247 sizeof(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]),
3248 "%s", ((vdev->config.lro_enable) ? "Enabled" : "Disabled"));
3250 snprintf(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3251 sizeof(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]),
3252 "%s", ((vdev->config.rth_enable) ? "Enabled" : "Disabled"));
3254 snprintf(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3255 sizeof(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]),
3256 "%s", ((vdev->ifp->if_capenable & IFCAP_TSO4) ?
3259 snprintf(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3260 sizeof(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]),
3263 if (vdev->is_privilaged) {
3267 snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3268 sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]),
3269 "%s", vxge_port_mode[vdev->port_mode]);
3271 if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3272 snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3273 sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]),
3274 "%s", vxge_port_failure[vdev->port_failure]);
3276 vxge_active_port_update(vdev);
3277 snprintf(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT],
3278 sizeof(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]),
3279 "%lld", vdev->active_port);
3283 snprintf(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3284 sizeof(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]),
3285 "%s", ((vdev->l2_switch) ? "Enabled" : "Disabled"));
3290 vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]);
3293 vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]);
3296 vdev->config.nic_attr[VXGE_PRINT_PART_NO]);
3299 vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]);
3302 vdev->config.nic_attr[VXGE_PRINT_FW_DATE]);
3305 vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]);
3307 if (vdev->is_privilaged) {
3309 vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]);
3313 vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]);
3316 vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]);
3319 vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]);
3322 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0]);
3326 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1]);
3328 if (vdev->is_privilaged) {
3330 vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]);
3332 if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3334 vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]);
3336 device_printf(vdev->ndev, "Active Port\t: %s\n",
3337 vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]);
3341 if (vdev->is_privilaged && !is_single_func(hw_info->function_mode)) {
3342 device_printf(vdev->ndev, "L2 Switch\t: %s\n",
3343 vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]);
3347 vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]);
3350 vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]);
3353 vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]);
3356 vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]);
3360 vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3365 vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3370 vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3375 vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3380 vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3385 vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3388 if (vdev->is_privilaged) {
3391 vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3397 vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3402 vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3407 vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3412 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0],
3419 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1],
3422 if (vdev->is_privilaged) {
3425 vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3428 if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3431 vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3436 vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3443 vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3448 vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3453 vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3458 vxge_pmd_port_type_get(vxge_dev_t *vdev, u32 port_type,
3462 vdev->ifm_optics = IFM_UNKNOWN;
3466 vdev->ifm_optics = IFM_10G_SR;
3471 vdev->ifm_optics = IFM_10G_LR;
3476 vdev->ifm_optics = IFM_10G_LRM;
3481 vdev->ifm_optics = IFM_10G_TWINAX;
3486 vdev->ifm_optics = IFM_10G_CX4;
3492 vdev->ifm_optics = IFM_10G_T;
3502 vdev->ifm_optics = IFM_1000_SX;
3507 vdev->ifm_optics = IFM_1000_LX;
3512 vdev->ifm_optics = IFM_1000_CX;
3517 vdev->ifm_optics = IFM_1000_T;
3572 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
3575 if (!vdev->is_active)
3587 err = vxge_change_mtu(vdev, (unsigned long)ifr->ifr_mtu);
3592 VXGE_DRV_LOCK(vdev);
3595 if ((ifp->if_flags ^ vdev->if_flags) &
3597 vxge_promisc_set(vdev);
3599 vxge_init_locked(vdev);
3603 vxge_stop_locked(vdev);
3605 vdev->if_flags = ifp->if_flags;
3606 VXGE_DRV_UNLOCK(vdev);
3617 err = ifmedia_ioctl(ifp, ifr, &vdev->media, command);
3622 VXGE_DRV_LOCK(vdev);
3681 VXGE_DRV_UNLOCK(vdev);
3685 VXGE_DRV_LOCK(vdev);
3686 err = vxge_ioctl_stats(vdev, ifr);
3687 VXGE_DRV_UNLOCK(vdev);
3691 VXGE_DRV_LOCK(vdev);
3692 err = vxge_ioctl_regs(vdev, ifr);
3693 VXGE_DRV_UNLOCK(vdev);
3709 vxge_ioctl_regs(vxge_dev_t *vdev, struct ifreq *ifr)
3725 if (vdev->is_privilaged) {
3732 if (vdev->is_privilaged) {
3739 if (vdev->is_privilaged) {
3746 if (vdev->is_privilaged) {
3770 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3777 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3782 *((u32 *) reg_info) = vdev->no_of_vpath;
3795 status = vxge_hal_mgmt_reg_read(vdev->devh, regs_type,
3813 vxge_ioctl_stats(vxge_dev_t *vdev, struct ifreq *ifr)
3832 status = vxge_hal_aux_pci_config_read(vdev->devh,
3837 device_printf(vdev->ndev,
3845 if (!vdev->is_privilaged)
3851 status = vxge_hal_aux_stats_mrpcim_read(vdev->devh,
3856 device_printf(vdev->ndev,
3867 status = vxge_hal_aux_stats_device_read(vdev->devh,
3872 device_printf(vdev->ndev,
3885 &vdev->config.hw_info,
3889 vdev->port_mode;
3892 vdev->port_failure;
3896 device_printf(vdev->ndev,
3904 bufsize = sizeof(vxge_drv_stats_t) * vdev->no_of_vpath;
3907 for (i = 0; i < vdev->no_of_vpath; i++) {
3908 vpath = &(vdev->vpaths[i]);
3923 device_printf(vdev->ndev,
3933 if ((vdev->config.hw_info.func_id != 0) &&
3934 (vdev->hw_fw_version < VXGE_FW_VERSION(1, 8, 0)))
3937 if (vdev->config.hw_info.func_id != 0)
3938 bw_info->func_id = vdev->config.hw_info.func_id;
3940 status = vxge_bw_priority_get(vdev, bw_info);
3948 if (vdev->is_privilaged)
3949 err = vxge_bw_priority_set(vdev, ifr);
3953 if (vdev->is_privilaged) {
3954 if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3956 vdev->config.port_mode = port_info->port_mode;
3957 err = vxge_port_mode_update(vdev);
3962 device_printf(vdev->ndev,
3970 if (vdev->is_privilaged) {
3971 if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3973 err = vxge_port_mode_get(vdev, port_info);
3990 vxge_bw_priority_config(vxge_dev_t *vdev)
3995 for (i = 0; i < vdev->no_of_func; i++) {
3996 err = vxge_bw_priority_update(vdev, i, TRUE);
4005 vxge_bw_priority_set(vxge_dev_t *vdev, struct ifreq *ifr)
4014 vdev->config.bw_info[func_id].priority = bw_info->priority;
4015 vdev->config.bw_info[func_id].bandwidth = bw_info->bandwidth;
4017 err = vxge_bw_priority_update(vdev, func_id, FALSE);
4023 vxge_bw_priority_update(vxge_dev_t *vdev, u32 func_id, bool binit)
4033 hldev = vdev->devh;
4035 status = vxge_hal_get_vpath_list(vdev->devh, func_id,
4045 if (vdev->config.bw_info[func_id].bandwidth !=
4049 bandwidth = vdev->config.bw_info[func_id].bandwidth;
4066 if (binit && vdev->config.low_latency) {
4068 vdev->config.bw_info[func_id].priority =
4073 if (vdev->config.bw_info[func_id].priority !=
4077 priority = vdev->config.bw_info[func_id].priority;
4085 } else if (vdev->config.low_latency) {
4091 status = vxge_hal_rx_bw_priority_set(vdev->devh,
4098 vdev->devh, vpath_list[i]);