Lines Matching refs:mcr
1232 uint16_t mcr;
1237 mcr = CSR_READ_2(sc, VTE_MCR0);
1238 mcr &= ~(MCR0_FC_ENB | MCR0_FULL_DUPLEX);
1240 mcr |= MCR0_FULL_DUPLEX;
1243 mcr |= MCR0_FC_ENB;
1251 mcr |= MCR0_FC_ENB;
1254 CSR_WRITE_2(sc, VTE_MCR0, mcr);
1587 uint16_t mcr;
1590 mcr = CSR_READ_2(sc, VTE_MCR1);
1591 CSR_WRITE_2(sc, VTE_MCR1, mcr | MCR1_MAC_RESET);
1598 device_printf(sc->vte_dev, "reset timeout(0x%04x)!\n", mcr);
1807 uint16_t mcr;
1813 mcr = CSR_READ_2(sc, VTE_MCR0);
1814 if ((mcr & (MCR0_RX_ENB | MCR0_TX_ENB)) !=
1816 mcr |= MCR0_RX_ENB | MCR0_TX_ENB;
1817 CSR_WRITE_2(sc, VTE_MCR0, mcr);
1819 mcr = CSR_READ_2(sc, VTE_MCR0);
1820 if ((mcr & (MCR0_RX_ENB | MCR0_TX_ENB)) ==
1827 "could not enable RX/TX MAC(0x%04x)!\n", mcr);
1834 uint16_t mcr;
1840 mcr = CSR_READ_2(sc, VTE_MCR0);
1841 if ((mcr & (MCR0_RX_ENB | MCR0_TX_ENB)) != 0) {
1842 mcr &= ~(MCR0_RX_ENB | MCR0_TX_ENB);
1843 CSR_WRITE_2(sc, VTE_MCR0, mcr);
1845 mcr = CSR_READ_2(sc, VTE_MCR0);
1846 if ((mcr & (MCR0_RX_ENB | MCR0_TX_ENB)) == 0)
1852 "could not disable RX/TX MAC(0x%04x)!\n", mcr);
1947 uint16_t mchash[4], mcr;
1961 mcr = CSR_READ_2(sc, VTE_MCR0);
1962 mcr &= ~(MCR0_PROMISC | MCR0_MULTICAST);
1963 mcr |= MCR0_BROADCAST_DIS;
1965 mcr &= ~MCR0_BROADCAST_DIS;
1968 mcr |= MCR0_PROMISC;
1970 mcr |= MCR0_MULTICAST;
2003 mcr |= MCR0_MULTICAST;
2020 CSR_WRITE_2(sc, VTE_MCR0, mcr);