Lines Matching defs:opcode
566 u32 opcode = 0;
572 opcode |= (is_src_type_grc ? DMAE_CMD_SRC_MASK_GRC
577 opcode |= (src_pfid & DMAE_CMD_SRC_PF_ID_MASK) <<
581 opcode |= (is_dst_type_grc ? DMAE_CMD_DST_MASK_GRC
586 opcode |= (dst_pfid & DMAE_CMD_DST_PF_ID_MASK) <<
590 /* opcode |= (!b_complete_to_host)<< DMAE_CMD_C_DST_SHIFT;*/
596 opcode |= DMAE_CMD_COMP_WORD_EN_MASK << DMAE_CMD_COMP_WORD_EN_SHIFT;
597 opcode |= DMAE_CMD_SRC_ADDR_RESET_MASK <<
601 opcode |= 1 << DMAE_CMD_COMP_FUNC_SHIFT;
606 opcode |= DMAE_CMD_ENDIANITY << DMAE_CMD_ENDIANITY_MODE_SHIFT;
610 opcode |= port_id << DMAE_CMD_PORT_ID_SHIFT;
613 opcode |= DMAE_CMD_SRC_ADDR_RESET_MASK <<
617 opcode |= DMAE_CMD_DST_ADDR_RESET_MASK <<
622 opcode |= (1 << DMAE_CMD_SRC_VF_ID_VALID_SHIFT);
629 opcode |= 1 << DMAE_CMD_DST_VF_ID_VALID_SHIFT;
636 p_hwfn->dmae_info.p_dmae_cmd->opcode = OSAL_CPU_TO_LE32(opcode);
661 "opcode = [0x%08x,0x%04x] len=0x%x src=0x%x:%x dst=0x%x:%x\n",
663 OSAL_LE32_TO_CPU(p_command->opcode),
675 "Posting DMAE command [idx %d]: opcode = [0x%08x,0x%04x] len=0x%x src=0x%x:%x dst=0x%x:%x\n",
677 OSAL_LE32_TO_CPU(p_command->opcode),