qlnx/qlnxe/ecore_hsi_common.h

289 	__le32 src_mac_addrhi /* hi 4 bytes source mac address */;
290 	__le16 src_mac_addrlo /* lo 2 bytes of source mac address */;
327 	struct regpair bd_base /* bd address of the first bd page */;
328 	struct regpair cqe_pbl_addr /* Base address on host of CQE PBL */;
1589 	struct regpair msg_addr /* VF-PF message address */;
1683 	GFT_PROFILE_TYPE_IP_DST_ADDR /* tunnel type, inner IP destination address and IP type match. */,
1684 	GFT_PROFILE_TYPE_IP_SRC_ADDR /* tunnel type, inner IP source address and IP type match. */,
1840 	struct regpair consolid_q_pbl_addr /* PBL address of consolidation queue */;
2097 	struct regpair vf_pf_msg_addr /* VF-PF message address */;
2202 #define DMAE_CMD_SRC_ADDR_RESET_MASK   0x1 /* Reset the source address in the next go to the same source address of the previous go */
2204 #define DMAE_CMD_DST_ADDR_RESET_MASK   0x1 /* Reset the destination address in the next go to the same destination address of the previous go */
2212 #define DMAE_CMD_COMP_CRC_OFFSET_MASK  0x7 /* The CRC word should be taken from the DMAE address space from address 9+X, where X is the value in these bits. */
2232 	__le32 src_addr_lo /* PCIe source address low in bytes or GRC source address in DW */;
2233 	__le32 src_addr_hi /* PCIe source address high in bytes or reserved (if source is GRC) */;
2234 	__le32 dst_addr_lo /* PCIe destination address low in bytes or GRC destination address in DW */;
2235 	__le32 dst_addr_hi /* PCIe destination address high in bytes or reserved (if destination is GRC) */;
2242 	__le32 comp_addr_lo /* PCIe completion address low in bytes or GRC completion address in DW */;
2243 	__le32 comp_addr_hi /* PCIe completion address high in bytes or reserved (if completion address is GRC) */;
2244 	__le32 comp_val /* Value to write to completion address */;
2529 	__le32 grc_addr /* GRC address where the fw_info struct is located. */;
2606 	struct regpair address;