dev/ppbus/if_plip.c

80  * Update for ppbus, PLIP support only - Nicolas Souchu
109 #include <dev/ppbus/ppbconf.h>
111 #include <dev/ppbus/ppbio.h>
272 	 * own the ppbus.
291 	device_t ppbus = device_get_parent(dev);
293 	ppb_lock(ppbus);
295 	ppb_unlock(ppbus);
351 	device_t ppbus = device_get_parent(sc->sc_dev);
353 	ppb_assert_locked(ppbus);
354 	ppb_wctr(ppbus, 0x00);
360 	ppb_release_bus(ppbus, sc->sc_dev);
368 	device_t ppbus = device_get_parent(dev);
371 	ppb_assert_locked(ppbus);
372 	error = ppb_request_bus(ppbus, dev, PPB_DONTWAIT);
377 	ppb_set_mode(ppbus, PPB_COMPATIBLE);
380 		ppb_release_bus(ppbus, dev);
387 		ppb_release_bus(ppbus, dev);
391 	ppb_wctr(ppbus, IRQENABLE);
406 	device_t ppbus = device_get_parent(dev);
422 		ppb_lock(ppbus);
429 		ppb_unlock(ppbus);
433 		ppb_lock(ppbus);
438 				ppb_unlock(ppbus);
446 		ppb_unlock(ppbus);
481 clpoutbyte(u_char byte, int spin, device_t ppbus)
484 	ppb_wdtr(ppbus, ctxmitl[byte]);
485 	while (ppb_rstr(ppbus) & CLPIP_SHAKE)
489 	ppb_wdtr(ppbus, ctxmith[byte]);
490 	while (!(ppb_rstr(ppbus) & CLPIP_SHAKE))
498 clpinbyte(int spin, device_t ppbus)
502 	while ((ppb_rstr(ppbus) & CLPIP_SHAKE))
506 	cl = ppb_rstr(ppbus);
507 	ppb_wdtr(ppbus, 0x10);
509 	while (!(ppb_rstr(ppbus) & CLPIP_SHAKE))
513 	c = ppb_rstr(ppbus);
514 	ppb_wdtr(ppbus, 0x00);
531 	device_t ppbus = device_get_parent(sc->sc_dev);
537 	ppb_assert_locked(ppbus);
541 		ppb_wdtr(ppbus, 0x01);
544 		j = clpinbyte(LPMAXSPIN2, ppbus);
548 		j = clpinbyte(LPMAXSPIN2, ppbus);
558 			j = clpinbyte(LPMAXSPIN2, ppbus);
566 		j = clpinbyte(LPMAXSPIN2, ppbus);
583 			ppb_unlock(ppbus);
591 			ppb_lock(ppbus);
595 	while ((ppb_rstr(ppbus) & LPIP_SHAKE)) {
600 			cl = ppb_rstr(ppbus);
601 			ppb_wdtr(ppbus, 8);
604 			while ((ppb_rstr(ppbus) & LPIP_SHAKE))
608 			c = ppb_rstr(ppbus);
609 			ppb_wdtr(ppbus, 0);
614 			while (!((cl = ppb_rstr(ppbus)) & LPIP_SHAKE)) {
616 				    (((cl = ppb_rstr(ppbus)) ^ 0xb8) & 0xf8) ==
637 			ppb_unlock(ppbus);
645 			ppb_lock(ppbus);
651 	ppb_wdtr(ppbus, 0);
662 		ppb_wctr(ppbus, 0x00);
669 lpoutbyte(u_char byte, int spin, device_t ppbus)
672 	ppb_wdtr(ppbus, txmith[byte]);
673 	while (!(ppb_rstr(ppbus) & LPIP_SHAKE))
676 	ppb_wdtr(ppbus, txmitl[byte]);
677 	while (ppb_rstr(ppbus) & LPIP_SHAKE)
689 	device_t ppbus = device_get_parent(dev);
699 	ppb_lock(ppbus);
705 	ppb_wctr(ppbus, IRQENABLE);
708 		if (!(ppb_rstr(ppbus) & CLPIP_SHAKE)) {
715 		ppb_wdtr(ppbus, 0x08);
716 		while ((ppb_rstr(ppbus) & 0x08) == 0)
729 		if (clpoutbyte(count & 0xFF, LPMAXSPIN1, ppbus))
731 		if (clpoutbyte((count >> 8) & 0xFF, LPMAXSPIN1, ppbus))
736 			if (clpoutbyte(i, LPMAXSPIN1, ppbus))
741 		if (clpoutbyte(0x08, LPMAXSPIN1, ppbus))
743 		if (clpoutbyte(0x00, LPMAXSPIN1, ppbus))
753 				if (clpoutbyte(*cp++, LPMAXSPIN2, ppbus))
759 		if (clpoutbyte(chksum, LPMAXSPIN2, ppbus))
763 		ppb_wdtr(ppbus, 0);
781 		if (!(ppb_rstr(ppbus) & CLPIP_SHAKE)) {
785 		ppb_unlock(ppbus);
789 	if (ppb_rstr(ppbus) & LPIP_SHAKE) {
794 	if (lpoutbyte(0x08, LPMAXSPIN1, ppbus))
796 	if (lpoutbyte(0x00, LPMAXSPIN2, ppbus))
804 			if (lpoutbyte(*cp++, LPMAXSPIN2, ppbus))
812 	ppb_wdtr(ppbus, txmitl[*cp] ^ 0x17);
827 	if (ppb_rstr(ppbus) & LPIP_SHAKE) {
832 	ppb_unlock(ppbus);
852 DRIVER_MODULE(plip, ppbus, lp_driver, lp_devclass, lp_module_handler, 0);
853 MODULE_DEPEND(plip, ppbus, 1, 1, 1);