sat/src/smsat.c

9409   bit8                    Caching[MODE_SENSE6_CACHING_LEN];
9749       Caching[0] = 0x20 - 1; /* 32 - 1 */
9750       Caching[1] = 0x00; /* default medium type (currently mounted medium type) */
9751       Caching[2] = 0x00; /* no write-protect, no support for DPO-FUA */
9752       Caching[3] = 0x08; /* block descriptor length */
9754       sm_memcpy(pModeSense, &Caching, 4);
9765     Caching[0] = MODE_SENSE6_CACHING_LEN - 1;
9766     Caching[1] = 0x00; /* default medium type (currently mounted medium type) */
9767     Caching[2] = 0x00; /* no write-protect, no support for DPO-FUA */
9768     Caching[3] = 0x08; /* block descriptor length */
9774     Caching[4]  = 0x04; /* density-code : reserved for direct-access */
9776     Caching[5]  = 0x00; /* unspecified */
9777     Caching[6]  = 0x00; /* unspecified */
9778     Caching[7]  = 0x00; /* unspecified */
9780     Caching[8]  = 0x00; /* reserved */
9782     Caching[9]  = 0x00;
9783     Caching[10] = 0x02;   /* Block size is always 512 bytes */
9784     Caching[11] = 0x00;
9786      * Fill-up Caching mode page, SAT, Table 67
9789     Caching[12] = 0x08; /* page code */
9790     Caching[13] = 0x12; /* page length */
9793       Caching[14] = 0x04;/* WCE bit is set */
9797       Caching[14] = 0x00;/* WCE bit is NOT set */
9800     Caching[15] = 0x00;
9801     Caching[16] = 0x00;
9802     Caching[17] = 0x00;
9803     Caching[18] = 0x00;
9804     Caching[19] = 0x00;
9805     Caching[20] = 0x00;
9806     Caching[21] = 0x00;
9807     Caching[22] = 0x00;
9808     Caching[23] = 0x00;
9811       Caching[24] = 0x00;/* DRA bit is NOT set */
9815       Caching[24] = 0x20;/* DRA bit is set */
9817     Caching[25] = 0x00;
9818     Caching[26] = 0x00;
9819     Caching[27] = 0x00;
9820     Caching[28] = 0x00;
9821     Caching[29] = 0x00;
9822     Caching[30] = 0x00;
9823     Caching[31] = 0x00;
9825     sm_memcpy(pModeSense, &Caching, lenRead);
9951   bit8                    Caching[MODE_SENSE10_CACHING_LLBAA_LEN];
10204      * Fill-up Caching mode page, SAT, Table 67
10495     Caching[0] = 0;
10496     Caching[1] = (bit8)(lenRead - 2);
10497     Caching[2] = 0x00; /* medium type: default medium type (currently mounted medium type) */
10498     Caching[3] = 0x00; /* device-specific param: no write-protect, no support for DPO-FUA */
10501       Caching[4] = 0x00; /* reserved and LONGLBA */
10502       Caching[4] = (bit8)(Caching[4] | 0x1); /* LONGLBA is set */
10506       Caching[4] = 0x00; /* reserved and LONGLBA: LONGLBA is not set */
10508     Caching[5] = 0x00; /* reserved */
10509     Caching[6] = 0x00; /* block descriptot length */
10512       Caching[7] = 0x10; /* block descriptor length: LONGLBA is set. So, length is 16 */
10516       Caching[7] = 0x08; /* block descriptor length: LONGLBA is NOT set. So, length is 8 */
10526       Caching[8]   = 0x04; /* density-code : reserved for direct-access */
10528       Caching[9]   = 0x00; /* unspecified */
10529       Caching[10]  = 0x00; /* unspecified */
10530       Caching[11]  = 0x00; /* unspecified */
10531       Caching[12]  = 0x00; /* unspecified */
10532       Caching[13]  = 0x00; /* unspecified */
10533       Caching[14]  = 0x00; /* unspecified */
10534       Caching[15]  = 0x00; /* unspecified */
10536       Caching[16]  = 0x00; /* reserved */
10537       Caching[17]  = 0x00; /* reserved */
10538       Caching[18]  = 0x00; /* reserved */
10539       Caching[19]  = 0x00; /* reserved */
10541       Caching[20]  = 0x00;
10542       Caching[21]  = 0x00;
10543       Caching[22]  = 0x02;   /* Block size is always 512 bytes */
10544       Caching[23]  = 0x00;
10549       Caching[8]   = 0x04; /* density-code : reserved for direct-access */
10551       Caching[9]   = 0x00; /* unspecified */
10552       Caching[10]  = 0x00; /* unspecified */
10553       Caching[11]  = 0x00; /* unspecified */
10555       Caching[12]  = 0x00; /* reserved */
10557       Caching[13]  = 0x00;
10558       Caching[14]  = 0x02;   /* Block size is always 512 bytes */
10559       Caching[15]  = 0x00;
10571      * Fill-up Caching mode page, SAT, Table 67
10574     Caching[index+0] = 0x08; /* page code */
10575     Caching[index+1] = 0x12; /* page length */
10578       Caching[index+2] = 0x04;/* WCE bit is set */
10582       Caching[index+2] = 0x00;/* WCE bit is NOT set */
10585     Caching[index+3] = 0x00;
10586     Caching[index+4] = 0x00;
10587     Caching[index+5] = 0x00;
10588     Caching[index+6] = 0x00;
10589     Caching[index+7] = 0x00;
10590     Caching[index+8] = 0x00;
10591     Caching[index+9] = 0x00;
10592     Caching[index+10] = 0x00;
10593     Caching[index+11] = 0x00;
10596       Caching[index+12] = 0x00;/* DRA bit is NOT set */
10600       Caching[index+12] = 0x20;/* DRA bit is set */
10602     Caching[index+13] = 0x00;
10603     Caching[index+14] = 0x00;
10604     Caching[index+15] = 0x00;
10605     Caching[index+16] = 0x00;
10606     Caching[index+17] = 0x00;
10607     Caching[index+18] = 0x00;
10608     Caching[index+19] = 0x00;
10609     sm_memcpy(pModeSense, &Caching, lenRead);
13913     SM_DBG5(("smsatModeSelect6: Caching mode page\n"));
14447     SM_DBG5(("smsatModeSelect10: Caching mode page\n"));