Lines Matching refs:swConfig
64 * \param swConfig Pointer to the software configuration
76 agsaSwConfig_t *swConfig,
89 SA_ASSERT((agNULL != swConfig), "");
97 SA_DBG1(("saGetRequirements:agRoot %p swConfig %p memoryRequirement %p usecsPerTick %p maxNumLocks %p\n",agRoot, swConfig,memoryRequirement,usecsPerTick,maxNumLocks));
101 /* Set the default/specified requirements swConfig from TD layer */
102 siConfiguration(agRoot, &mpiConfig, agNULL, swConfig);
121 memoryRequirement->agMemory[DEVICELINK_MEM_INDEX].numElements = swConfig->numDevHandles;
123 * swConfig->numDevHandles;
138 memoryRequirement->agMemory[IOREQLINK_MEM_INDEX].numElements = swConfig->maxActiveIOs + SA_RESERVED_REQUEST_COUNT;
168 memoryRequirement->agMemory[LL_FUNCTION_TRACE].numElements = swConfig->TraceBufferSize;
169 memoryRequirement->agMemory[LL_FUNCTION_TRACE].totalLength = swConfig->TraceBufferSize;
243 if (swConfig->param3 == agNULL)
251 queueConfig = (agsaQueueConfig_t *)swConfig->param3;
265 swConfig->legacyInt_X = 1;
266 swConfig->max_MSI_InterruptVectors = 32;
267 swConfig->max_MSIX_InterruptVectors = 64;//16;
269 SA_DBG1(("saGetRequirements: swConfig->stallUsec %d\n",swConfig->stallUsec ));
272 SA_DBG1(("saGetRequirements: swConfig->disableMDF %d\n",swConfig->disableMDF));
274 /*SA_DBG1(("saGetRequirements: swConfig->enableDIF %d\n",swConfig->enableDIF ));*/
275 /*SA_DBG1(("saGetRequirements: swConfig->enableEncryption %d\n",swConfig->enableEncryption ));*/
277 swConfig->hostDirectAccessSupport = 1;
278 swConfig->hostDirectAccessMode = 0;
280 swConfig->hostDirectAccessSupport = 0;
281 swConfig->hostDirectAccessMode = 0;
295 * \param swConfig Pointer to the software configuration
307 agsaSwConfig_t *swConfig,
335 SA_ASSERT((agNULL != swConfig), "");
409 (swConfig != &saRoot->swConfig) )
413 agsaSwConfig_t *swC = &saRoot->swConfig;
419 *swC = *swConfig;
427 gLLDebugLevel = swConfig->sallDebugLevel & 0xF;
472 SA_DBG1(("saInitialize: swConfig->PortRecoveryResetTimer %x\n",swConfig->PortRecoveryResetTimer ));
483 SA_DBG1(("saInitialize: SA_ENABLE_PCI_TRIGGER a 0x%08x %p\n", saRoot->swConfig.PCI_trigger,&saRoot->swConfig.PCI_trigger));
485 if( saRoot->swConfig.PCI_trigger & PCI_TRIGGER_INIT_TEST )
487 SA_DBG1(("saInitialize: SA_ENABLE_PCI_TRIGGER 0x%08x %p\n", saRoot->swConfig.PCI_trigger,&saRoot->swConfig.PCI_trigger));
488 saRoot->swConfig.PCI_trigger &= ~PCI_TRIGGER_INIT_TEST;
722 SA_DBG1(("swConfig->numSASDevHandles =%d\n", swConfig->numDevHandles));
724 smTrace(hpDBG_VERY_LOUD,"29",swConfig->numDevHandles);
725 /* TP:29 swConfig->numDevHandles */
746 maxNumIODevices = swConfig->numDevHandles;
747 SA_DBG2(("saInitialize: maxNumIODevices=%d, swConfig->numDevHandles=%d \n",
749 swConfig->numDevHandles));
752 SA_DBG1(("saInitialize: swConfig->PCI_trigger= 0x%x\n", swConfig->PCI_trigger));
794 for ( i = 0; i < swConfig->maxActiveIOs; i ++ )
906 saRoot->minStallusecs = swConfig->stallUsec;
951 if (!swConfig->param3)
954 siConfiguration(agRoot, &saRoot->mpiConfig, hwConfig, swConfig);
960 agsaQueueConfig_t *sCFG = (agsaQueueConfig_t *)swConfig->param3;
984 ret = siConfiguration(agRoot, &saRoot->mpiConfig, hwConfig, swConfig);
996 saRoot->swConfig.param3 = &saRoot->QueueConfig;
1025 if ((!swConfig->max_MSI_InterruptVectors) &&
1026 (!swConfig->max_MSIX_InterruptVectors) &&
1027 (!swConfig->legacyInt_X))
1035 SA_DBG1(("saInitialize: swConfig->max_MSI_InterruptVectors %d\n",swConfig->max_MSI_InterruptVectors));
1036 SA_DBG1(("saInitialize: swConfig->max_MSIX_InterruptVectors %d\n",swConfig->max_MSIX_InterruptVectors));
1038 if ((swConfig->legacyInt_X > 1) || (swConfig->max_MSI_InterruptVectors > 32) ||
1039 (swConfig->max_MSIX_InterruptVectors > 64))
1047 if ((swConfig->legacyInt_X) && (swConfig->max_MSI_InterruptVectors))
1055 else if ((swConfig->legacyInt_X) && (swConfig->max_MSIX_InterruptVectors))
1063 else if ((swConfig->max_MSI_InterruptVectors) && (swConfig->max_MSIX_InterruptVectors))
1078 if (swConfig->legacyInt_X)
1084 else if (swConfig->max_MSIX_InterruptVectors)
1090 else if (swConfig->max_MSI_InterruptVectors)
1107 if (swConfig->legacyInt_X )
1114 else if (swConfig->max_MSIX_InterruptVectors)
1116 SA_DBG1(("saInitialize: SPC V max_MSIX_InterruptVectors %X\n", swConfig->max_MSIX_InterruptVectors));
1121 else if (swConfig->max_MSI_InterruptVectors)
1204 if (swConfig->hostDirectAccessSupport)
1206 if (AGSA_RC_FAILURE == siHDAMode(agRoot, swConfig->hostDirectAccessMode, (agsaFwImg_t *)swConfig->param4))
1236 swConfig->hostDirectAccessSupport = 1;
1237 swConfig->hostDirectAccessMode = 1;
1266 SA_DBG1(("saInitialize: SPCv swConfig->hostDirectAccessMode %d swConfig->hostDirectAccessSupport %d\n",swConfig->hostDirectAccessMode,swConfig->hostDirectAccessSupport));
1267 if (swConfig->hostDirectAccessSupport)
1280 if( swConfig->hostDirectAccessMode == 0)
1312 if (AGSA_RC_FAILURE == siHDAMode_V(agRoot, swConfig->hostDirectAccessMode, (agsaFwImg_t *)swConfig->param4))
1360 SA_DBG1(("saInitialize: MaxOutstandingIO 0x%x swConfig->maxActiveIOs 0x%x\n", saRoot->ControllerInfo.maxPendingIO,saRoot->swConfig.maxActiveIOs ));
1366 swConfig->hostDirectAccessSupport = 1;
1367 swConfig->hostDirectAccessMode = 1;
1383 if(saRoot->swConfig.fatalErrorInterruptEnable)
1385 ossaDisableInterrupts(agRoot,saRoot->swConfig.fatalErrorInterruptVector );
1406 SA_DBG1(("saInitialize: swConfig->fatalErrorInterruptEnable %X\n",swConfig->fatalErrorInterruptEnable));
1408 SA_DBG1(("saInitialize: saRoot->swConfig.fatalErrorInterruptVector %X\n",saRoot->swConfig.fatalErrorInterruptVector));
1409 SA_DBG1(("saInitialize: swConfig->max_MSI_InterruptVectors %X\n",swConfig->max_MSI_InterruptVectors));
1410 SA_DBG1(("saInitialize: swConfig->max_MSIX_InterruptVectors %X\n",swConfig->max_MSIX_InterruptVectors));
1411 SA_DBG1(("saInitialize: swConfig->legacyInt_X %X\n",swConfig->legacyInt_X));
1412 SA_DBG1(("saInitialize: swConfig->hostDirectAccessSupport %X\n",swConfig->hostDirectAccessSupport));
1413 SA_DBG1(("saInitialize: swConfig->hostDirectAccessMode %X\n",swConfig->hostDirectAccessMode));
1416 SA_DBG1(("saInitialize: swConfig->disableMDF %X\n",swConfig->disableMDF));
1418 /*SA_DBG1(("saInitialize: swConfig->enableDIF %X\n",swConfig->enableDIF));*/
1419 /*SA_DBG1(("saInitialize: swConfig->enableEncryption %X\n",swConfig->enableEncryption));*/
1453 SA_DBG1(("saInitialize: swConfig.fatalErrorInterruptEnable %d\n",saRoot->swConfig.fatalErrorInterruptEnable));
1454 SA_DBG1(("saInitialize: swConfig.fatalErrorInterruptVector %d\n",saRoot->swConfig.fatalErrorInterruptVector));
1455 SA_DBG1(("saInitialize: swConfig->max_MSIX_InterruptVectors %X\n",swConfig->max_MSIX_InterruptVectors));
1457 if(saRoot->swConfig.fatalErrorInterruptEnable)
1467 ossaReenableInterrupts(agRoot,saRoot->swConfig.fatalErrorInterruptVector );
1479 siDumpActiveIORequests(agRoot, saRoot->swConfig.maxActiveIOs);
1509 saFatalInterruptHandler(agRoot, saRoot->swConfig.fatalErrorInterruptVector );
1551 * \param swConfig Pointer to the software configuration
1560 agsaSwConfig_t *swConfig
1577 sidump_swConfig(swConfig);
1579 mpiConfig->mainConfig.custset = swConfig->FWConfig;
1581 SA_DBG1(("siConfiguration:custset %8X %8X\n",mpiConfig->mainConfig.custset,swConfig->FWConfig));
1583 if (swConfig->param3 == agNULL)
1585 SA_DBG1(("siConfiguration: swConfig->param3 == agNULL\n"));
1638 queueConfig = (agsaQueueConfig_t *)swConfig->param3;
1644 SA_DBG1(("siConfiguration: swConfig->param3 == %p\n",queueConfig));
1662 mpiConfig->mainConfig.eventLogSize = swConfig->sizefEventLog1 * KBYTES;
1663 mpiConfig->mainConfig.eventLogOption = swConfig->eventLog1Option;
1664 mpiConfig->mainConfig.IOPeventLogSize = swConfig->sizefEventLog2 * KBYTES;
1665 mpiConfig->mainConfig.IOPeventLogOption = swConfig->eventLog2Option;
1696 swConfig->sgpioSupportEnable = 1;
1702 (swConfig->fatalErrorInterruptEnable) /* bit 0*/ |
1704 (swConfig->sgpioSupportEnable ? (0x1 << SHIFT2): 0) |
1707 (swConfig->disableMDF ? (0x1 << SHIFT4): 0) |
1713 ((swConfig->fatalErrorInterruptVector & FATAL_ERROR_INT_BITS) << SHIFT8) |
1718 SA_DBG1(("siConfiguration: swConfig->fatalErrorInterruptEnable %X\n",swConfig->fatalErrorInterruptEnable));
1719 SA_DBG1(("siConfiguration: swConfig->fatalErrorInterruptVector %X\n",swConfig->fatalErrorInterruptVector));
1730 mpiConfig->mainConfig.PortRecoveryTimerPortResetTimer = swConfig->PortRecoveryResetTimer;
1764 /* We configure the size of queue based on swConfig */
1780 /* We configure the size of queue based on swConfig */
1800 SA_DBG1(("siConfiguration:swConfig->fatalErrorInterruptVector 0x%X\n",swConfig->fatalErrorInterruptVector));
1802 SA_DBG1(("siConfiguration:PortRecoveryResetTimer 0x%X\n",swConfig->PortRecoveryResetTimer));
2539 if(agNULL != saRoot->swConfig.mpiContextTable )
2541 agsaMPIContext_t * context = (agsaMPIContext_t * )saRoot->swConfig.mpiContextTable;
2542 bit32 length = saRoot->swConfig.mpiContextTablelen;
2632 SA_DBG1(("mpiInitialize: context %p saRoot->swConfig.mpiContextTable %p %d\n",context,saRoot->swConfig.mpiContextTable,context == saRoot->swConfig.mpiContextTable ? 1 : 0));
3365 SA_DBG1(("mpiWaitForConfigTable: MaxOutstandingIO 0x%x swConfig->maxActiveIOs 0x%x\n", config->MaxOutstandingIO,saRoot->swConfig.maxActiveIOs ));
3799 agsaSwConfig_t *swConfig,
3836 maxNumIODevices = swConfig->numDevHandles;
3837 SA_DBG2(("siInitResources: maxNumIODevices=%d, swConfig->numDevHandles=%d \n",
3839 swConfig->numDevHandles));
3880 for ( i = 0; i < swConfig->maxActiveIOs; i ++ )