Lines Matching defs:mpiConfig

84   static mpiConfig_t  mpiConfig;
95 si_memset(&mpiConfig, 0, sizeof(mpiConfig_t));
102 siConfiguration(agRoot, &mpiConfig, agNULL, swConfig);
103 mpiRequirementsGet(&mpiConfig, &mpiMemoryRequirement);
954 siConfiguration(agRoot, &saRoot->mpiConfig, hwConfig, swConfig);
984 ret = siConfiguration(agRoot, &saRoot->mpiConfig, hwConfig, swConfig);
1332 si_memcpy(&saRoot->mpiConfig.phyAnalogConfig, &hwConfig->phyAnalogConfig, sizeof(agsaPhyAnalogSetupTable_t));
1359 ret = mpiInitialize(agRoot, &mpiMemoryAllocated, &saRoot->mpiConfig);
1550 * \param mpiConfig MPI Configuration
1558 mpiConfig_t *mpiConfig,
1573 si_memset(mpiConfig, 0, sizeof(mpiConfig_t));
1574 SA_DBG1(("siConfiguration: si_memset mpiConfig\n"));
1579 mpiConfig->mainConfig.custset = swConfig->FWConfig;
1581 SA_DBG1(("siConfiguration:custset %8X %8X\n",mpiConfig->mainConfig.custset,swConfig->FWConfig));
1586 /* initialize the mpiConfig */
1588 mpiConfig->mainConfig.iQNPPD_HPPD_GEvent = 0;
1589 mpiConfig->mainConfig.outboundHWEventPID0_3 = 0;
1590 mpiConfig->mainConfig.outboundHWEventPID4_7 = 0;
1591 mpiConfig->mainConfig.outboundNCQEventPID0_3 = 0;
1592 mpiConfig->mainConfig.outboundNCQEventPID4_7 = 0;
1593 mpiConfig->mainConfig.outboundTargetITNexusEventPID0_3 = 0;
1594 mpiConfig->mainConfig.outboundTargetITNexusEventPID4_7 = 0;
1595 mpiConfig->mainConfig.outboundTargetSSPEventPID0_3 = 0;
1596 mpiConfig->mainConfig.outboundTargetSSPEventPID4_7 = 0;
1598 mpiConfig->mainConfig.ioAbortDelay = 0;
1600 mpiConfig->mainConfig.upperEventLogAddress = 0;
1601 mpiConfig->mainConfig.lowerEventLogAddress = 0;
1602 mpiConfig->mainConfig.eventLogSize = MPI_LOGSIZE;
1603 mpiConfig->mainConfig.eventLogOption = 0;
1604 mpiConfig->mainConfig.upperIOPeventLogAddress = 0;
1605 mpiConfig->mainConfig.lowerIOPeventLogAddress = 0;
1606 mpiConfig->mainConfig.IOPeventLogSize = MPI_LOGSIZE;
1607 mpiConfig->mainConfig.IOPeventLogOption = 0;
1608 mpiConfig->mainConfig.FatalErrorInterrupt = 0;
1611 mpiConfig->numInboundQueues = AGSA_MAX_INBOUND_Q;
1612 mpiConfig->numOutboundQueues = AGSA_MAX_OUTBOUND_Q;
1613 mpiConfig->maxNumInboundQueues = AGSA_MAX_INBOUND_Q;
1614 mpiConfig->maxNumOutboundQueues = AGSA_MAX_OUTBOUND_Q;
1619 mpiConfig->inboundQueues[i].numElements = INBOUND_DEPTH_SIZE;
1620 mpiConfig->inboundQueues[i].elementSize = IOMB_SIZE64;
1621 mpiConfig->inboundQueues[i].priority = MPI_QUEUE_NORMAL;
1627 mpiConfig->outboundQueues[i].numElements = OUTBOUND_DEPTH_SIZE;
1628 mpiConfig->outboundQueues[i].elementSize = IOMB_SIZE64;
1629 mpiConfig->outboundQueues[i].interruptVector = 0;
1630 mpiConfig->outboundQueues[i].interruptDelay = 0;
1631 mpiConfig->outboundQueues[i].interruptThreshold = 0;
1633 mpiConfig->outboundQueues[i].interruptEnable = 1;
1662 mpiConfig->mainConfig.eventLogSize = swConfig->sizefEventLog1 * KBYTES;
1663 mpiConfig->mainConfig.eventLogOption = swConfig->eventLog1Option;
1664 mpiConfig->mainConfig.IOPeventLogSize = swConfig->sizefEventLog2 * KBYTES;
1665 mpiConfig->mainConfig.IOPeventLogOption = swConfig->eventLog2Option;
1701 mpiConfig->mainConfig.FatalErrorInterrupt =
1723 /* initialize the mpiConfig */
1725 mpiConfig->mainConfig.outboundTargetITNexusEventPID0_3 = 0;
1726 mpiConfig->mainConfig.outboundTargetITNexusEventPID4_7 = 0;
1727 mpiConfig->mainConfig.outboundTargetSSPEventPID0_3 = 0;
1728 mpiConfig->mainConfig.outboundTargetSSPEventPID4_7 = 0;
1729 mpiConfig->mainConfig.ioAbortDelay = 0;
1730 mpiConfig->mainConfig.PortRecoveryTimerPortResetTimer = swConfig->PortRecoveryResetTimer;
1733 mpiConfig->mainConfig.iQNPPD_HPPD_GEvent = queueConfig->iqNormalPriorityProcessingDepth |
1738 mpiConfig->mainConfig.outboundHWEventPID0_3 = queueConfig->sasHwEventQueue[0] |
1742 mpiConfig->mainConfig.outboundHWEventPID4_7 = queueConfig->sasHwEventQueue[4] |
1746 mpiConfig->mainConfig.outboundNCQEventPID0_3 = queueConfig->sataNCQErrorEventQueue[0] |
1750 mpiConfig->mainConfig.outboundNCQEventPID4_7 = queueConfig->sataNCQErrorEventQueue[4] |
1755 mpiConfig->numInboundQueues = queueConfig->numInboundQueues;
1756 mpiConfig->numOutboundQueues = queueConfig->numOutboundQueues;
1757 mpiConfig->queueOption = queueConfig->queueOption;
1767 mpiConfig->inboundQueues[i].numElements = (bit16)queueConfig->inboundQueues[i].elementCount;
1768 mpiConfig->inboundQueues[i].elementSize = (bit16)queueConfig->inboundQueues[i].elementSize;;
1769 mpiConfig->inboundQueues[i].priority = queueConfig->inboundQueues[i].priority;
1783 mpiConfig->outboundQueues[i].numElements = (bit16)queueConfig->outboundQueues[i].elementCount;
1784 mpiConfig->outboundQueues[i].elementSize = (bit16)queueConfig->outboundQueues[i].elementSize;
1785 mpiConfig->outboundQueues[i].interruptVector = (bit8)queueConfig->outboundQueues[i].interruptVectorIndex;
1786 mpiConfig->outboundQueues[i].interruptDelay = (bit16)queueConfig->outboundQueues[i].interruptDelay;
1787 mpiConfig->outboundQueues[i].interruptThreshold = (bit8)queueConfig->outboundQueues[i].interruptCount;
1788 mpiConfig->outboundQueues[i].interruptEnable = (bit32)queueConfig->outboundQueues[i].interruptEnable;
1799 SA_DBG1(("siConfiguration:mpiConfig->mainConfig.FatalErrorInterrupt 0x%X\n",mpiConfig->mainConfig.FatalErrorInterrupt));
1816 //mpiConfig_t *mpiConfig = &saRoot->mpiConfig;
1817 mpiHostLLConfigDescriptor_t *mpiConfig = &saRoot->mainConfigTable;
1820 *eventLogSize = (U32)mpiConfig->eventLogSize;