Lines Matching defs:address
263 * HPET MMIO base address may appear in Bar1 for AMD SB600 SMBus
479 /* return base address of memory or port map */
523 /* return base address of device ROM */
551 /* return log2 of address range supported by map register */
1385 pci_write_msix_entry(device_t dev, u_int index, uint64_t address, uint32_t data)
1393 bus_write_4(msix->msix_table_res, offset, address & 0xffffffff);
1394 bus_write_4(msix->msix_table_res, offset + 4, address >> 32);
1400 uint64_t address, uint32_t data)
1420 pci_write_msix_entry(child, index, address, data);
1423 pci_ht_map_msi(child, address);
2031 pci_enable_msi_method(device_t dev, device_t child, uint64_t address,
2037 /* Write data and address values. */
2039 address & 0xffffffff, 4);
2042 address >> 32, 4);
2055 pci_ht_map_msi(child, address);
2075 * restore the data and address registers in addition to the control
2083 uint64_t address;
2087 address = msi->msi_addr;
2090 address & 0xffffffff, 4);
2093 PCIR_MSI_ADDR_HIGH, address >> 32, 4);
2118 * of MSI IRQs. If we find it, we request updated address and
2994 "pci%d:%d:%d:%d bar %#x too many address bits",
3974 * us the address and data register values.