dev/cxgbe/t4_main.c

968 		 * like mac addr.
2298 position_memwin(struct adapter *sc, int idx, uint32_t addr)
2310 		mw->mw_curpos = addr & ~0xf;	/* start must be 16B aligned */
2313 		mw->mw_curpos = addr & ~0x7f;	/* start must be 128B aligned */
2321 rw_via_memwin(struct adapter *sc, int idx, uint32_t addr, uint32_t *val,
2330 	if (addr & 3 || len & 3 || len <= 0)
2337 		if (addr >= mw_end || addr < mw->mw_curpos) {
2344 			position_memwin(sc, idx, addr);
2349 		while (addr < mw_end && len > 0) {
2351 				v = t4_read_reg(sc, mw->mw_base + addr -
2356 				t4_write_reg(sc, mw->mw_base + addr -
2359 			addr += 4;
2369 read_via_memwin(struct adapter *sc, int idx, uint32_t addr, uint32_t *val,
2373 	return (rw_via_memwin(sc, idx, addr, val, len, 0));
2377 write_via_memwin(struct adapter *sc, int idx, uint32_t addr,
2381 	return (rw_via_memwin(sc, idx, addr, (void *)(uintptr_t)val, len, 1));
2392  * Verify that the memory range specified by the addr/len pair is valid within
2396 validate_mem_range(struct adapter *sc, uint32_t addr, int len)
2403 	if (addr & 3 || len & 3 || len <= 0)
2417 			if (addr >= r->start &&
2418 			    addr + len <= r->start + r->size)
2429 			if (addr >= r->start &&
2430 			    addr + len <= r->start + r->size)
2441 			if (addr >= r->start &&
2442 			    addr + len <= r->start + r->size)
2453 			if (addr >= r->start &&
2454 			    addr + len <= r->start + r->size)
2509 			if (addr >= r->start &&
2510 			    addr + len <= r->start + r->size)
2539  * the start of the range is returned in addr.
2543     uint32_t *addr)
2581 	*addr = maddr + off;	/* global address */
2582 	return (validate_mem_range(sc, *addr, len));
2592 	    dparams->size, &dparams->addr);
3201 		uint32_t param, val, addr;
3243 		rc = validate_mt_off_len(sc, mtype, moff, cflen, &addr);
3246 			    "%s: addr (%d/0x%x) or len %d is not valid: %d.  "
3251 		write_via_memwin(sc, 2, addr, cfdata, cflen);
6497 	if (dparams->addr == 0)
6504 	rc = read_via_memwin(sc, 1, dparams->addr, (void *)buf, dparams->size);
7014 tcamxy2valmask(uint64_t x, uint64_t y, uint8_t *addr, uint64_t *mask)
7018 	memcpy(addr, (char *)&y + 2, ETHER_ADDR_LEN);
7044 		uint8_t addr[ETHER_ADDR_LEN];
7050 		tcamxy2valmask(tcamx, tcamy, addr, &mask);
7054 			   "  %c   %#x%4u%4d", i, addr[0], addr[1], addr[2],
7055 			   addr[3], addr[4], addr[5], (uintmax_t)mask,
7135 		uint8_t addr[ETHER_ADDR_LEN];
7177 		tcamxy2valmask(tcamx, tcamy, addr, &mask);
7185 			    "      'I'  %4x   %3c   %#x%4u%4d", i, addr[0],
7186 			    addr[1], addr[2], addr[3], addr[4], addr[5],
7193 			    "%012jx    -       -   ", i, addr[0], addr[1],
7194 			    addr[2], addr[3], addr[4], addr[5],
8843 	uint32_t addr, remaining, n;
8848 	rc = validate_mem_range(sc, mr->addr, mr->len);
8853 	addr = mr->addr;
8859 		read_via_memwin(sc, 2, addr, buf, n);
8867 		addr += n;
9023 		if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len)
9027 			edata->val = t4_read_reg(sc, edata->addr);
9029 			edata->val = t4_read_reg64(sc, edata->addr);
9038 		if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len)
9044 			t4_write_reg(sc, edata->addr, (uint32_t) edata->val);
9046 			t4_write_reg64(sc, edata->addr, edata->val);