dev/arcmsr/arcmsr.c

354 	u_int32_t intmask_org = 0;
359 			intmask_org = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intmask); /* disable outbound message0 int */
360 			CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intmask, intmask_org|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE);
366 			intmask_org = READ_CHIP_REG32(0, phbbmu->iop2drv_doorbell_mask)
373 			intmask_org = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask)	; /* disable outbound message0 int */
374 			CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE);
379 			intmask_org = CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable)	; /* disable outbound message0 int */
385 			intmask_org = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_mask)	; /* disable outbound message0 int */
386 			CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_mask, intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE);
390 	return (intmask_org);
396 static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org)
404 			CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intmask, intmask_org & mask);
405 			acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
412 			WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell_mask, intmask_org | mask); /*1=interrupt enable, 0=interrupt disable*/
413 			acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
419 			CHIP_REG_WRITE32(HBC_MessageUnit, 0, host_int_mask, intmask_org & mask);
420 			acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
426 			CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | mask);
434 			CHIP_REG_WRITE32(HBE_MessageUnit, 0, host_int_mask, intmask_org & mask);
435 			acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1038 	u_int32_t intmask_org;
1043 		intmask_org = arcmsr_disable_allintr(acb);
1060 		arcmsr_enable_allintr(acb, intmask_org);
1772 	u_int32_t intmask_org;
1776 	intmask_org = arcmsr_disable_allintr(acb);
1792 	arcmsr_enable_allintr(acb, intmask_org);
2338 	u_int32_t intmask_org;
2350 	intmask_org = CHIP_REG_READ32(HBD_MessageUnit, 0, pcief0_int_enable)	; /* disable outbound message0 int */
2361 	CHIP_REG_WRITE32(HBD_MessageUnit, 0, pcief0_int_enable, intmask_org | ARCMSR_HBDMU_ALL_INT_ENABLE);
2482 	u_int32_t intmask_org;
2487 			intmask_org = arcmsr_disable_allintr(acb);
2490 			arcmsr_enable_allintr(acb, intmask_org);
2995 	u_int32_t intmask_org;
3010 		intmask_org = arcmsr_disable_allintr(acb);
3022 					arcmsr_enable_allintr(acb, intmask_org);
3028 		arcmsr_enable_allintr(acb, intmask_org);
4304 	u_int32_t intmask_org;
4307 	intmask_org = arcmsr_disable_allintr(acb);
4317 	arcmsr_enable_allintr(acb, intmask_org);
4985 	u_int32_t intmask_org;
4992 	intmask_org = arcmsr_disable_allintr(acb);