Target/X86/X86ISelLowering.cpp

649     // Set up the FP register classes.
677     // Expand FP immediates into loads from the stack, except for the special
683     // Set up the FP register classes.
704     // Special cases we handle for FP constants.
718     // Set up the FP register classes.
1835     // If this is x86-64, and we disabled SSE, we can't return FP values,
1850     // the RET instruction and handled by the FP Stackifier.
1854       // change the value to the FP stack register class.
1985     // If this is x86-64, and we disabled SSE, we can't return FP values
3507 /// code. Current x86 isa includes the following FP cmov instructions:
3526 /// specified FP immediate natively. If false, the legalizer will
3527 /// materialize the FP immediate as a load from a constant pool.
8642   // FP constant to bias correct the final result.
8815   // We lower FP->int64 either into FISTP64 followed by a load from a temporary
9920     // Handle all other FP comparisons here.
12283   // Save FP Control Word to stack slot
12297   // Load FP Control Word from stack slot
15753   // Since FP is only updated here but NOT referenced, it's treated as GPR.
15756   unsigned FP = (PVT == MVT::i64) ? X86::RBP : X86::EBP;
15767   // Reload FP
15768   MIB = BuildMI(*MBB, MI, DL, TII->get(PtrLoadOpc), FP);
17525 // where both setccs reference the same FP CMP, and rewrite for CMPEQSS
18389   // the FP state in cases where an emms may be missing.
18997   // a 32-bit target where SSE doesn't support i64->FP operations.
19575   // FP X constraints get lowered to SSE1/2 registers if available, otherwise
19774     case 'f':  // FP Stack registers.