CodeGen/SelectionDAG/TargetLowering.cpp

87                             bool isSigned, SDLoc dl,
109                     DAG, dl);
119                                          SDLoc dl) const {
201                        dl).first;
205     SDValue Tmp = DAG.getNode(ISD::SETCC, dl,
209                          dl).first;
210     NewLHS = DAG.getNode(ISD::SETCC, dl,
213     NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS);
283   SDLoc dl(Op);
301       SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
323                                                     SDLoc dl) {
346       SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
347                               DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
349                               DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
353                               dl, Op.getValueType(), X);
377   SDLoc dl(Op);
449     if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
483     if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
508     if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
515       return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
533         return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
547           SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
623           return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
644             TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
648                           TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
670             SDValue NewExt = TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT,
672             return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl, VT,
711           return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
735                            TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
767         return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
777         return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
802       return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
838                           TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,ExVT));
858       return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
880       return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
898       return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
967           SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl,
970           return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
1010         SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
1013           Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
1016         return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
1036     if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
1123                               DAGCombinerInfo &DCI, SDLoc dl) const {
1145     return DAG.getSetCC(dl, VT, N1, N0, SwappedCC);
1170         return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
1189         SDValue Sub = DAG.getNode(ISD::SUB, dl, CTVT, CTOp,
1191         SDValue And = DAG.getNode(ISD::AND, dl, CTVT, CTOp, Sub);
1193         return DAG.getSetCC(dl, VT, And, DAG.getConstant(0, CTVT), CC);
1229           SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreZExt);
1231           return DAG.getSetCC(dl, VT, Trunc, C, Cond);
1280             Ptr = DAG.getNode(ISD::ADD, dl, PtrType, Lod->getBasePtr(),
1283           SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
1286           return DAG.getSetCC(dl, VT,
1287                               DAG.getNode(ISD::AND, dl, newVT, NewLoad,
1335           return DAG.getSetCC(dl, VT, N0.getOperand(0),
1361         ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
1367       return DAG.getSetCC(dl, VT, ZextOp,
1380           return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
1387           return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
1410             Val = DAG.getNode(ISD::AND, dl, N0.getValueType(),
1415           return DAG.getSetCC(dl, VT, Val, N1,
1430           return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
1438             Op0 = DAG.getNode(ISD::AND, dl, VT,
1439                           DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
1442             Op0 = DAG.getNode(ISD::AND, dl, VT,
1443                         DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
1446           return DAG.getSetCC(dl, VT, Op0,
1452           return DAG.getSetCC(dl, VT, Op0,
1472       return DAG.getSetCC(dl, VT, N0,
1480       return DAG.getSetCC(dl, VT, N0,
1496       return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
1499       return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
1503       return DAG.getSetCC(dl, VT, N0,
1508       return DAG.getSetCC(dl, VT, N0,
1518       return DAG.getSetCC(dl, VT, N0,
1528       return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT);
1543             return DAG.getNode(ISD::TRUNCATE, dl, VT,
1544                               DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
1551             return DAG.getNode(ISD::TRUNCATE, dl, VT,
1552                                DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
1571             SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0.getOperand(0),
1574             return DAG.getSetCC(dl, VT, Shift, CmpRHS, Cond);
1599           SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0,
1602           return DAG.getSetCC(dl, VT, Shift, CmpRHS, NewCond);
1610     SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond, dl);
1633       return DAG.getSetCC(dl, VT, N0, N0, Cond);
1645             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
1648             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
1651             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGT);
1654             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
1658             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
1661             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
1664             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULT);
1667             return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLT);
1701       return DAG.getSetCC(dl, VT, N0, N1, NewCond);
1711           return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
1713           return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
1717             return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
1720             return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
1733             return DAG.getSetCC(dl, VT, N0.getOperand(0),
1745                 DAG.getSetCC(dl, VT, N0.getOperand(0),
1756               DAG.getSetCC(dl, VT, N0.getOperand(1),
1775           return DAG.getSetCC(dl, VT, N0.getOperand(1),
1779             return DAG.getSetCC(dl, VT, N0.getOperand(0),
1784             SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1,
1788             return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
1798         return DAG.getSetCC(dl, VT, N1.getOperand(1),
1802           return DAG.getSetCC(dl, VT, N1.getOperand(0),
1807           SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
1811           return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
1827             return DAG.getSetCC(dl, VT, N0, Zero, Cond);
1838             return DAG.getSetCC(dl, VT, N1, Zero, Cond);
1850       Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
1851       N0 = DAG.getNOT(dl, Temp, MVT::i1);
1856       N0 = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
1860       Temp = DAG.getNOT(dl, N0, MVT::i1);
1861       N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N1, Temp);
1867       Temp = DAG.getNOT(dl, N1, MVT::i1);
1868       N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N0, Temp);
1874       Temp = DAG.getNOT(dl, N0, MVT::i1);
1875       N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N1, Temp);
1881       Temp = DAG.getNOT(dl, N1, MVT::i1);
1882       N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N0, Temp);
1889       N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0);
2512 SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, SDLoc dl,
2523     Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt);
2533   return DAG.getNode(ISD::MUL, dl, Op1.getValueType(), Op1, Op2);
2544   SDLoc dl(N);
2559     Q = DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
2563     Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
2570     Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0));
2576     Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0));
2582     Q = DAG.getNode(ISD::SRA, dl, VT, Q,
2589     DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1,
2593   return DAG.getNode(ISD::ADD, dl, VT, Q, T);
2604   SDLoc dl(N);
2622     Q = DAG.getNode(ISD::SRL, dl, VT, Q,
2636     Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT));
2639     Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q,
2649     return DAG.getNode(ISD::SRL, dl, VT, Q,
2652     SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q);
2655     NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ,
2659     NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q);
2662     return DAG.getNode(ISD::SRL, dl, VT, NPQ,