Lines Matching refs:trueop0

1461   rtx trueop0, trueop1;
1478 trueop0 = avoid_constant_pool_reference (op0);
1481 tem = simplify_const_binary_operation (code, mode, trueop0, trueop1);
1484 return simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
1494 rtx op0, rtx op1, rtx trueop0, rtx trueop1)
1709 if (rtx_equal_p (trueop0, trueop1)
1718 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1722 if (trueop0 == constm1_rtx)
1847 && trueop0 == const1_rtx
1986 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2101 if (rtx_equal_p (trueop0, trueop1)
2213 && (nonzero_bits (trueop0, mode) & ~INTVAL (trueop1)) == 0)
2215 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0)
2333 if (trueop0 == CONST0_RTX (mode))
2336 return simplify_gen_binary (AND, mode, op1, trueop0);
2337 return trueop0;
2356 if (trueop0 == CONST0_RTX (mode)
2391 if (trueop0 == CONST0_RTX (mode))
2394 return simplify_gen_binary (AND, mode, op1, trueop0);
2395 return trueop0;
2411 if (trueop0 == CONST0_RTX (mode))
2414 return simplify_gen_binary (AND, mode, op1, trueop0);
2415 return trueop0;
2433 if (trueop0 == CONST0_RTX (mode))
2436 return simplify_gen_binary (AND, mode, op1, trueop0);
2437 return trueop0;
2453 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2456 if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
2457 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
2466 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2473 if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
2498 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2512 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2522 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2532 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
2549 gcc_assert (VECTOR_MODE_P (GET_MODE (trueop0)));
2550 gcc_assert (mode == GET_MODE_INNER (GET_MODE (trueop0)));
2555 if (GET_CODE (trueop0) == CONST_VECTOR)
2556 return CONST_VECTOR_ELT (trueop0, INTVAL (XVECEXP
2561 gcc_assert (VECTOR_MODE_P (GET_MODE (trueop0)));
2563 == GET_MODE_INNER (GET_MODE (trueop0)));
2566 if (GET_CODE (trueop0) == CONST_VECTOR)
2579 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0,
2589 && GET_CODE (trueop0) == VEC_CONCAT)
2591 rtx vec = trueop0;
2616 enum machine_mode op0_mode = (GET_MODE (trueop0) != VOIDmode
2617 ? GET_MODE (trueop0)
2639 if ((GET_CODE (trueop0) == CONST_VECTOR
2640 || GET_CODE (trueop0) == CONST_INT
2641 || GET_CODE (trueop0) == CONST_DOUBLE)
2659 RTVEC_ELT (v, i) = trueop0;
2661 RTVEC_ELT (v, i) = CONST_VECTOR_ELT (trueop0, i);
3519 rtx tem, trueop0, trueop1;
3586 trueop0 = avoid_constant_pool_reference (op0);
3589 trueop0, trueop1);
3707 rtx trueop0;
3740 trueop0 = avoid_constant_pool_reference (op0);
3755 && ! ((REG_P (op0) || GET_CODE (trueop0) == CONST_INT)
3771 if (! HONOR_NANS (GET_MODE (trueop0))
3772 && rtx_equal_p (trueop0, trueop1)
3773 && ! side_effects_p (trueop0))
3778 else if (GET_CODE (trueop0) == CONST_DOUBLE
3780 && SCALAR_FLOAT_MODE_P (GET_MODE (trueop0)))
3784 REAL_VALUE_FROM_CONST_DOUBLE (d0, trueop0);
3818 && (GET_CODE (trueop0) == CONST_DOUBLE
3819 || GET_CODE (trueop0) == CONST_INT)
3828 if (GET_CODE (trueop0) == CONST_DOUBLE)
3830 l0u = l0s = CONST_DOUBLE_LOW (trueop0);
3831 h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
3835 l0u = l0s = INTVAL (trueop0);
3952 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
3953 : trueop0;
3974 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
3975 : trueop0;
3993 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
3994 : trueop0;