include/opcode/ia64.h

64     IA64_OPND_AR3,	/* third application register # (bits 20-26) */
65     IA64_OPND_B1,	/* branch register # (bits 6-8) */
66     IA64_OPND_B2,	/* branch register # (bits 13-15) */
67     IA64_OPND_CR3,	/* third control register # (bits 20-26) */
95     IA64_OPND_CCNT5,	/* 5-bit count (31 - bits 20-24) */
96     IA64_OPND_CNT2a,	/* 2-bit count (1 + bits 27-28) */
97     IA64_OPND_CNT2b,	/* 2-bit count (bits 27-28): 1, 2, 3 */
98     IA64_OPND_CNT2c,	/* 2-bit count (bits 30-31): 0, 7, 15, or 16 */
99     IA64_OPND_CNT5,	/* 5-bit count (bits 14-18) */
100     IA64_OPND_CNT6,	/* 6-bit count (bits 27-32) */
101     IA64_OPND_CPOS6a,	/* 6-bit count (63 - bits 20-25) */
102     IA64_OPND_CPOS6b,	/* 6-bit count (63 - bits 14-19) */
103     IA64_OPND_CPOS6c,	/* 6-bit count (63 - bits 31-36) */
105     IA64_OPND_IMMU2,	/* unsigned 2-bit immediate (bits 13-14) */
106     IA64_OPND_IMMU5b,	/* unsigned 5-bit immediate (32 + bits 14-18) */
107     IA64_OPND_IMMU7a,	/* unsigned 7-bit immediate (bits 13-19) */
108     IA64_OPND_IMMU7b,	/* unsigned 7-bit immediate (bits 20-26) */
112     IA64_OPND_IMM8,	/* signed 8-bit immediate (bits 13-19 & 36) */
113     IA64_OPND_IMM8U4,	/* cmp4*u signed 8-bit immediate (bits 13-19 & 36) */
114     IA64_OPND_IMM8M1,	/* signed 8-bit immediate -1 (bits 13-19 & 36) */
115     IA64_OPND_IMM8M1U4,	/* cmp4*u signed 8-bit immediate -1 (bits 13-19 & 36)*/
116     IA64_OPND_IMM8M1U8,	/* cmp*u signed 8-bit immediate -1 (bits 13-19 & 36) */
117     IA64_OPND_IMMU9,	/* unsigned 9-bit immediate (bits 33-34, 20-26) */
118     IA64_OPND_IMM9a,	/* signed 9-bit immediate (bits 6-12, 27, 36) */
119     IA64_OPND_IMM9b,	/* signed 9-bit immediate (bits 13-19, 27, 36) */
120     IA64_OPND_IMM14,	/* signed 14-bit immediate (bits 13-19, 27-32, 36) */
121     IA64_OPND_IMM17,	/* signed 17-bit immediate (2*bits 6-12, 24-31, 36) */
122     IA64_OPND_IMMU21,	/* unsigned 21-bit immediate (bits 6-25, 36) */
123     IA64_OPND_IMM22,	/* signed 22-bit immediate (bits 13-19, 22-36) */
124     IA64_OPND_IMMU24,	/* unsigned 24-bit immediate (bits 6-26, 31-32, 36) */
125     IA64_OPND_IMM44,	/* signed 44-bit immediate (2^16*bits 6-32, 36) */
127     IA64_OPND_IMMU64,	/* unsigned 64-bit immediate (lotsa bits...) */
128     IA64_OPND_INC3,	/* signed 3-bit (bits 13-15): +/-1, 4, 8, 16 */
129     IA64_OPND_LEN4,	/* 4-bit count (bits 27-30 + 1) */
130     IA64_OPND_LEN6,	/* 6-bit count (bits 27-32 + 1) */
131     IA64_OPND_MBTYPE4,	/* 4-bit mux type (bits 20-23) */
132     IA64_OPND_MHTYPE8,	/* 8-bit mux type (bits 20-27) */
133     IA64_OPND_POS6,	/* 6-bit count (bits 14-19) */
134     IA64_OPND_TAG13,	/* signed 13-bit tag (ip + 16*bits 6-12, 33-34) */
135     IA64_OPND_TAG13b,	/* signed 13-bit tag (ip + 16*bits 24-32) */
136     IA64_OPND_TGT25,	/* signed 25-bit (ip + 16*bits 6-25, 36) */
137     IA64_OPND_TGT25b,	/* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */
138     IA64_OPND_TGT25c,	/* signed 25-bit (ip + 16*bits 13-32, 36) */
139     IA64_OPND_TGT64,    /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */
195   IA64_RS_PSR, /* PSR bits */
272     /* The opcode itself.  Those bits which will be filled in with
277        mask containing ones indicating those bits which must match the
278        opcode field, and zeroes indicating those bits which need not
331   /* Set VALUE as the operand bits for the operand of type SELF in the
338   /* Extract the operand bits for an operand of type SELF from
351       /* The number of bits in the operand.  */
352       int bits;