Lines Matching defs:tm

118     template tm;
1358 pte (&x->tm);
1779 && (i.tm.base_opcode & 0xfffffde0) == 0xdce0)
1780 i.tm.base_opcode ^= Opcode_FloatR;
1785 if ((i.tm.base_opcode & ~9) == 0x0fb6)
1789 && (~i.tm.opcode_modifier
1796 as_bad (_("ambiguous operand size for `%s'"), i.tm.name);
1802 if (i.tm.opcode_modifier & FWait)
1807 if ((i.tm.opcode_modifier & IsString) != 0 && i.mem_operands != 0)
1830 if (i.tm.opcode_modifier & ImmExt)
1834 if ((i.tm.cpu_flags & (CpuSSE3|CpuSMAP)) && i.operands > 0)
1848 i.tm.name);
1855 operand from the opcode suffix stored in tm.extension_opcode. */
1863 exp->X_add_number = i.tm.extension_opcode;
1864 i.tm.extension_opcode = None;
1873 else if (!quiet_warnings && (i.tm.opcode_modifier & Ugh) != 0)
1876 as_warn (_("translating to `%sp'"), i.tm.name);
1880 if (i.tm.base_opcode == INT_OPCODE && i.op[0].imms->X_add_number == 3)
1882 i.tm.base_opcode = INT3_OPCODE;
1886 if ((i.tm.opcode_modifier & (Jump | JumpByte | JumpDword))
1896 if ((i.tm.opcode_modifier & Rex64) != 0)
2771 i.tm = *t;
2774 i.tm.operand_types[addr_prefix_disp]
2783 i.tm.base_opcode ^= found_reverse_match;
2785 i.tm.operand_types[0] = operand_types[1];
2786 i.tm.operand_types[1] = operand_types[0];
2796 if ((i.tm.operand_types[mem_op] & EsSeg) != 0)
2801 i.tm.name,
2811 else if ((i.tm.operand_types[mem_op + 1] & EsSeg) != 0)
2816 i.tm.name,
2829 if (i.tm.opcode_modifier & (Size16 | Size32 | Size64))
2831 if (i.tm.opcode_modifier & Size16)
2833 else if (i.tm.opcode_modifier & Size64)
2848 if (i.tm.base_opcode == 0xf20f38f1)
2854 else if (i.tm.base_opcode == 0xf20f38f0)
2864 if (i.tm.base_opcode == 0xf20f38f1
2865 || i.tm.base_opcode == 0xf20f38f0)
2869 i.tm.name);
2875 && !(i.tm.operand_types[op] & InOutPortReg))
2905 else if (intel_syntax && (i.tm.opcode_modifier & IgnoreSize))
2911 else if ((i.tm.opcode_modifier & DefaultSize)
2914 && (i.tm.opcode_modifier & No_sSuf))
2920 && ((i.tm.operand_types[0] & JumpAbsolute)
2921 || (i.tm.opcode_modifier & (JumpByte|JumpInterSegment))
2922 || (i.tm.base_opcode == 0x0f01 /* [ls][gi]dt */
2923 && i.tm.extension_opcode <= 3)))
2928 if (!(i.tm.opcode_modifier & No_qSuf))
2934 if (!(i.tm.opcode_modifier & No_lSuf))
2938 if (!(i.tm.opcode_modifier & No_wSuf))
2948 if (i.tm.opcode_modifier & W)
2957 unsigned int suffixes = (~i.tm.opcode_modifier
2965 if ((i.tm.opcode_modifier & W)
2967 && !(i.tm.opcode_modifier & (DefaultSize | IgnoreSize))))
2969 as_bad (_("ambiguous operand size for `%s'"), i.tm.name);
2981 if (i.tm.opcode_modifier & W)
2983 if (i.tm.opcode_modifier & ShortForm)
2984 i.tm.base_opcode |= 8;
2986 i.tm.base_opcode |= 1;
2992 if (i.tm.base_opcode == 0x0f01 && i.tm.extension_opcode == 0xc8)
3004 && !(i.tm.opcode_modifier & (IgnoreSize | FloatMF))
3007 && (i.tm.opcode_modifier & JumpByte))))
3011 if (i.tm.opcode_modifier & JumpByte) /* jcxz, loop */
3021 && (i.tm.opcode_modifier & NoRex64) == 0)
3028 || i.tm.base_opcode != 0x90)
3034 if (i.tm.opcode_modifier & FloatMF)
3035 i.tm.base_opcode ^= 4;
3056 && (i.tm.base_opcode == 0xfb7
3057 || i.tm.base_opcode == 0xfb6
3058 || i.tm.base_opcode == 0x63
3059 || i.tm.base_opcode == 0xfbe
3060 || i.tm.base_opcode == 0xfbf))
3064 if (i.tm.base_opcode == 0xf20f38f0)
3072 && (i.tm.operand_types[op] & InOutPortReg) == 0)
3081 && (i.tm.operand_types[op] & InOutPortReg) == 0)
3102 i.tm.name,
3119 && (i.tm.operand_types[op] & (Reg16 | Reg32 | Acc)) != 0)
3124 i.tm.name,
3131 && (i.tm.operand_types[op] & (Reg32 | Acc)) != 0)
3154 && (i.tm.operand_types[op] & (Reg32 | Acc)) != 0)
3173 && (i.tm.operand_types[op] & (Reg16 | Reg32 | Acc)) != 0)
3178 i.tm.name,
3185 && (i.tm.operand_types[op] & (Reg32 | Acc)) != 0)
3205 && (i.tm.operand_types[op] & (Reg16 | Reg32 | Acc)) != 0)
3210 i.tm.name,
3217 && (i.tm.operand_types[op] & (Reg16 | Acc)) != 0)
3246 overlap0 = i.types[0] & i.tm.operand_types[0];
3280 overlap1 = i.types[1] & i.tm.operand_types[1];
3315 overlap2 = i.types[2] & i.tm.operand_types[2];
3333 if (i.tm.opcode_modifier & RegKludge)
3335 if ((i.tm.cpu_flags & CpuSSE4_1))
3346 i.tm.name, register_prefix);
3349 i.tm.name, register_prefix);
3359 /* We need to adjust fields in i.tm since they are used by
3361 i.tm.operand_types [0] = i.tm.operand_types [1];
3362 i.tm.operand_types [1] = i.tm.operand_types [2];
3363 i.tm.operands--;
3378 if (i.tm.opcode_modifier & ShortForm)
3382 if (i.tm.base_opcode == POP_SEG_SHORT
3388 i.tm.base_opcode |= (i.op[0].regs->reg_num << 3);
3397 i.tm.base_opcode |= i.op[op].regs->reg_num;
3400 if (!quiet_warnings && (i.tm.opcode_modifier & Ugh) != 0)
3407 as_warn (_("translating to `%s %s%s,%s%s'"), i.tm.name,
3414 as_warn (_("translating to `%s %s%s'"), i.tm.name,
3420 else if (i.tm.opcode_modifier & Modrm)
3422 /* The opcode is completed (modulo i.tm.extension_opcode which
3428 else if ((i.tm.base_opcode & ~0x3) == MOV_AX_DISP32)
3432 else if ((i.tm.opcode_modifier & IsString) != 0)
3439 if ((i.tm.base_opcode == 0x8d /* lea */
3440 || (i.tm.cpu_flags & CpuSVME))
3442 as_warn (_("segment override on `%s' is ineffectual"), i.tm.name);
3497 /* One of the register operands will be encoded in the i.tm.reg
3498 field, the other in the combined i.tm.mode and i.tm.regmem
3503 if ((i.tm.operand_types[dest] & (AnyMem | RegMem)) == 0)
3705 (if any) based on i.tm.extension_opcode. Again, we must be
3721 if (i.tm.extension_opcode != None)
3742 if (i.tm.extension_opcode != None)
3743 i.rm.reg = i.tm.extension_opcode;
3800 *p = i.tm.base_opcode;
3833 if (i.tm.opcode_modifier & JumpByte)
3880 *p++ = i.tm.base_opcode;
3933 *p++ = i.tm.base_opcode;
3952 i.tm.name);
3971 if (i.tm.opcode_modifier & Jump)
3973 else if (i.tm.opcode_modifier & (JumpByte | JumpDword))
3975 else if (i.tm.opcode_modifier & JumpInterSegment)
3988 if ((i.tm.cpu_flags & (CpuSSSE3 | CpuSSE4 | CpuAES | CpuPCLMUL)) != 0
3989 && (i.tm.cpu_flags & CpuABM) == 0)
3991 if (i.tm.base_opcode & 0xff000000)
3993 prefix = (i.tm.base_opcode >> 24) & 0xff;
3997 else if (i.tm.base_opcode == 0x660f3880 || i.tm.base_opcode == 0x660f3881
3998 || i.tm.base_opcode == 0x660f3882)
4002 if (i.tm.base_opcode & 0xff000000)
4004 prefix = (i.tm.base_opcode >> 24) & 0xff;
4008 else if ((i.tm.base_opcode & 0xff0000) != 0)
4010 prefix = (i.tm.base_opcode >> 16) & 0xff;
4011 if ((i.tm.cpu_flags & CpuPadLock) != 0)
4035 if (fits_in_unsigned_byte (i.tm.base_opcode))
4037 FRAG_APPEND_1_CHAR (i.tm.base_opcode);
4041 if ((i.tm.cpu_flags & (CpuSSSE3 | CpuSSE4 | CpuAES | CpuPCLMUL)) != 0
4042 && (i.tm.cpu_flags & CpuABM) == 0)
4045 *p++ = (i.tm.base_opcode >> 16) & 0xff;
4047 else if (i.tm.base_opcode == 0x660f3880 ||
4048 i.tm.base_opcode == 0x660f3881 ||
4049 i.tm.base_opcode == 0x660f3882)
4052 *p++ = (i.tm.base_opcode >> 16) & 0xff;
4058 *p++ = (i.tm.base_opcode >> 8) & 0xff;
4059 *p = i.tm.base_opcode & 0xff;
4063 if (i.tm.opcode_modifier & Modrm)
4270 || (!i.suffix && (i.tm.opcode_modifier & No_lSuf))))