pexpert/arm/pe_omap335x.c

72 vm_offset_t gOmapTimerBase = 0x0;
201     HwReg32(gOmapTimerBase + TLDR) = 0xffffffe0;
202     HwReg32(gOmapTimerBase + TCRR) = 0xffffffe0;
204     HwReg32(gOmapTimerBase + TPIR) = 232000;
205     HwReg32(gOmapTimerBase + TNIR) = -768000;
207     HwReg32(gOmapTimerBase + TOCR) = 0;
208     HwReg32(gOmapTimerBase + TOWR) = 100;
210     HwReg32(gOmapTimerBase + TCLR) = (1 << 6);
215     HwReg32(gOmapTimerBase + TISR) = 0x7;   // 0x7; //0x2;
216     HwReg32(gOmapTimerBase + TIER) = 0x7;   // 0x7; //0x2;
230     HwReg32(gOmapTimerBase + TCLR) = (1 << 0) | (1 << 1) | (2 << 10);
258         HwReg32(gOmapTimerBase + TISR) = 0x7;   // 0x2; wrong?
314     return 0xffffffff - (HwReg32(gOmapTimerBase + TCRR));
324         mmio_set(gOmapTimerBase + TCLR, 0x1);
326         mmio_clear(gOmapTimerBase + TCLR, 0x1);
409     gOmapTimerBase = ml_io_map(OMAP335X_SCH_TIMER_BASE, PAGE_SIZE);