pexpert/arm/pe_omap335x.c

63 #define HwReg32(x) *((volatile uint32_t*)(x))
105     while ((HwReg32(OMAP3_UART_BASE + SSR) & SSR_TXFIFOFULL))
108     HwReg32(OMAP3_UART_BASE + THR) = c;
119     while ((HwReg32(gOmapSerialUartBase + SSR) & SSR_TXFIFOFULL))
122     HwReg32(gOmapSerialUartBase + THR) = c;
128     while (!(HwReg32(gOmapSerialUartBase + LSR) & LSR_DR)) {
132     return (HwReg32(gOmapSerialUartBase + RBR));
142     HwReg32(gOmapSerialUartBase + IER) = 0x00;
143     HwReg32(gOmapSerialUartBase + LCR) = LCR_BKSE | LCRVAL;
144     HwReg32(gOmapSerialUartBase + DLL) = baudDivisor & 0xFF;
145     HwReg32(gOmapSerialUartBase + DLM) = (baudDivisor >> 8) & 0xFF;
146     HwReg32(gOmapSerialUartBase + LCR) = LCRVAL;
147     HwReg32(gOmapSerialUartBase + MCR) = MCRVAL;
148     HwReg32(gOmapSerialUartBase + FCR) = FCRVAL;
163     HwReg32(INTCPS_MIR(0)) = 0xffffffff;
164     HwReg32(INTCPS_MIR(1)) = 0xffffffff;
165     HwReg32(INTCPS_MIR(2)) = 0xffffffff;
175     HwReg32(INTCPS_CONTROL) = (1 << 0);
201     HwReg32(gOmapTimerBase + TLDR) = 0xffffffe0;
202     HwReg32(gOmapTimerBase + TCRR) = 0xffffffe0;
204     HwReg32(gOmapTimerBase + TPIR) = 232000;
205     HwReg32(gOmapTimerBase + TNIR) = -768000;
207     HwReg32(gOmapTimerBase + TOCR) = 0;
208     HwReg32(gOmapTimerBase + TOWR) = 100;
210     HwReg32(gOmapTimerBase + TCLR) = (1 << 6);
215     HwReg32(gOmapTimerBase + TISR) = 0x7;   // 0x7; //0x2;
216     HwReg32(gOmapTimerBase + TIER) = 0x7;   // 0x7; //0x2;
224     // HwReg32(gOmapPrcmBase + 0x08) &= 0x02;
230     HwReg32(gOmapTimerBase + TCLR) = (1 << 0) | (1 << 1) | (2 << 10);
247     uint32_t irq_number = (HwReg32(INTCPS_SIR_IRQ)) & 0x7F;
258         HwReg32(gOmapTimerBase + TISR) = 0x7;   // 0x2; wrong?
268         HwReg32(INTCPS_CONTROL) = 0x1;
314     return 0xffffffff - (HwReg32(gOmapTimerBase + TCRR));