Lines Matching refs:rdmsr64
64 (rdmsr64(MSR_IA32_FEATURE_CONTROL) & MSR_IA32_FEATCTL_VMXON));
101 msr_image = rdmsr64(MSR_IA32_FEATURE_CONTROL);
143 msr_image = rdmsr64(MSR_IA32_VMX_BASIC);
149 msr_image = rdmsr64(MSR_IA32_VMXPINBASED_CTLS);
154 msr_image = rdmsr64(MSR_IA32_PROCBASED_CTLS);
159 msr_image = rdmsr64(MSR_IA32_VMX_EXIT_CTLS);
164 msr_image = rdmsr64(MSR_IA32_VMX_ENTRY_CTLS);
169 msr_image = rdmsr64(MSR_IA32_VMX_MISC);
179 specs->cr0_fixed_0 = (uint32_t)rdmsr64(MSR_IA32_VMX_CR0_FIXED0) & 0xFFFFFFFF;
180 specs->cr0_fixed_1 = (uint32_t)rdmsr64(MSR_IA32_VMX_CR0_FIXED1) & 0xFFFFFFFF;
183 specs->cr4_fixed_0 = (uint32_t)rdmsr64(MSR_IA32_VMX_CR4_FIXED0) & 0xFFFFFFFF;
184 specs->cr4_fixed_1 = (uint32_t)rdmsr64(MSR_IA32_VMX_CR4_FIXED1) & 0xFFFFFFFF;