osfmk/i386/cpuid.h

52 #define _HBit(n)		(1ULL << ((n)+32))
88 #define CPUID_FEATURE_SSE3      _HBit(0)  /* Streaming SIMD extensions 3 */
89 #define CPUID_FEATURE_PCLMULQDQ _HBit(1)  /* PCLMULQDQ instruction */
90 #define CPUID_FEATURE_DTES64    _HBit(2)  /* 64-bit DS layout */
91 #define CPUID_FEATURE_MONITOR   _HBit(3)  /* Monitor/mwait */
92 #define CPUID_FEATURE_DSCPL     _HBit(4)  /* Debug Store CPL */
93 #define CPUID_FEATURE_VMX       _HBit(5)  /* VMX */
94 #define CPUID_FEATURE_SMX       _HBit(6)  /* SMX */
95 #define CPUID_FEATURE_EST       _HBit(7)  /* Enhanced SpeedsTep (GV3) */
96 #define CPUID_FEATURE_TM2       _HBit(8)  /* Thermal Monitor 2 */
97 #define CPUID_FEATURE_SSSE3     _HBit(9)  /* Supplemental SSE3 instructions */
98 #define CPUID_FEATURE_CID       _HBit(10) /* L1 Context ID */
99 #define CPUID_FEATURE_SEGLIM64  _HBit(11) /* 64-bit segment limit checking */
100 #define CPUID_FEATURE_FMA       _HBit(12) /* Fused-Multiply-Add support */
101 #define CPUID_FEATURE_CX16      _HBit(13) /* CmpXchg16b instruction */
102 #define CPUID_FEATURE_xTPR      _HBit(14) /* Send Task PRiority msgs */
103 #define CPUID_FEATURE_PDCM      _HBit(15) /* Perf/Debug Capability MSR */
105 #define CPUID_FEATURE_PCID      _HBit(17) /* ASID-PCID support */
106 #define CPUID_FEATURE_DCA       _HBit(18) /* Direct Cache Access */
107 #define CPUID_FEATURE_SSE4_1    _HBit(19) /* Streaming SIMD extensions 4.1 */
108 #define CPUID_FEATURE_SSE4_2    _HBit(20) /* Streaming SIMD extensions 4.2 */
109 #define CPUID_FEATURE_x2APIC    _HBit(21) /* Extended APIC Mode */
110 #define CPUID_FEATURE_MOVBE     _HBit(22) /* MOVBE instruction */
111 #define CPUID_FEATURE_POPCNT    _HBit(23) /* POPCNT instruction */
112 #define CPUID_FEATURE_TSCTMR    _HBit(24) /* TSC deadline timer */
113 #define CPUID_FEATURE_AES       _HBit(25) /* AES instructions */
114 #define CPUID_FEATURE_XSAVE     _HBit(26) /* XSAVE instructions */
115 #define CPUID_FEATURE_OSXSAVE   _HBit(27) /* XGETBV/XSETBV instructions */
116 #define CPUID_FEATURE_AVX1_0	_HBit(28) /* AVX 1.0 instructions */
117 #define CPUID_FEATURE_VMM       _HBit(31) /* VMM (Hypervisor) present */
118 #define CPUID_FEATURE_SEGLIM64  _HBit(11) /* 64-bit segment limit checking */
119 #define CPUID_FEATURE_PCID      _HBit(17) /* ASID-PCID support */
120 #define CPUID_FEATURE_TSCTMR    _HBit(24) /* TSC deadline timer */
121 #define CPUID_FEATURE_AVX1_0	_HBit(28) /* AVX 1.0 instructions */
122 #define CPUID_FEATURE_F16C	_HBit(29) /* Float16 convert instructions */
123 #define CPUID_FEATURE_RDRAND	_HBit(30) /* RDRAND instruction */
151 #define CPUID_EXTFEATURE_LAHF	   _HBit(0)	/* LAFH/SAHF instructions */