Lines Matching refs:u8
46 3. vmull.u8 (q9,q8),q2,d2 where d2 = (1,1,1,1...,1), (q9,q8) + 16 16-bit elements x[0:15]
47 4. vmull.u8 (q11,q10),q2,q0 where q0 = (1,2,3,4...,16), (q11,q10) + 16 16-bit elements (16:1)*x[0:15]
53 3. vmull.u8 (4 q registers),(q2,q14),d2 where d2 = (1,1,1,1...,1), (4 q registers) : 32 16-bit elements x[0:31]
54 4. vmull.u8 (4 q registers),(q2,q14),(q0,q15) where q0 = (1,...,32), (4 q regs) : 32 16-bit elements (32:1)*x[0:31]
243 vmull.u8 q8, x0_x7, ones // 16-bit x0-x7
245 vmull.u8 q9, x8_x15, ones // 16-bit x8-x15
247 vmull.u8 q12, d28, ones // 16-bit x16-x23
248 vmull.u8 q13, d29, ones // 16-bit x24-x31
249 vmull.u8 q10, d28, sum2_coeff0 // 16-bit x16*16, x17*15, ..., x23*9
250 vmull.u8 q11, d29, sum2_coeff1 // 16-bit x24*8, x25*7, ..., x31*1
252 vmull.u8 q9, x0_x7, d30 // 16-bit x0*32,...,x7*25
253 vmull.u8 q14, x8_x15, d31 // 16-bit x8*24,...,x15*17
273 vmull.u8 q8, x0_x7, ones // 16-bit x0-x7
274 vmull.u8 q9, x8_x15, ones // 16-bit x8-x15
275 vmull.u8 q10, x0_x7, sum2_coeff0 // 16-bit x0*16, x1*15, ..., x7*9
276 vmull.u8 q11, x8_x15, sum2_coeff1 // 16-bit x8*8, x9*7, ..., x15*1
312 vmull.u8 q8, x0_x7, ones // 16-bit x0-x7
314 vmull.u8 q9, x8_x15, ones // 16-bit x8-x15
316 vmull.u8 q12, d28, ones // 16-bit x16-x23
317 vmull.u8 q13, d29, ones // 16-bit x24-x31
318 vmull.u8 q10, d28, sum2_coeff0 // 16-bit x16*16, x17*15, ..., x23*9
319 vmull.u8 q11, d29, sum2_coeff1 // 16-bit x24*8, x25*7, ..., x31*1
321 vmull.u8 q9, x0_x7, d30 // 16-bit x0*32,...,x7*25
322 vmull.u8 q14, x8_x15, d31 // 16-bit x8*24,...,x15*17
348 vmull.u8 q8, x0_x7, ones // 16-bit x0-x7
349 vmull.u8 q9, x8_x15, ones // 16-bit x8-x15
350 vmull.u8 q10, x0_x7, sum2_coeff0 // 16-bit x0*16, x1*15, ..., x7*9
351 vmull.u8 q11, x8_x15, sum2_coeff1 // 16-bit x8*8, x9*7, ..., x15*1