cfe/pci/ldtinit.c

91     int offset, prev;
95     offset = PCI_CAPLIST_PTR(cpr) &~ 0x3;
98     while (offset != 0 && offset != prev) {
99 	cr = pci_conf_read(tag, offset);
103 		return offset;
105 		return offset;
107 	prev = offset;
108 	offset = PCI_CAPLIST_NEXT(cr) &~ 0x3;
117 ldt_get_link(pcitag_t tag, int offset, int index)
119     return pci_conf_read(tag, offset + LDT_LINKn_OFF(index));
123 ldt_set_link(pcitag_t tag, int offset, int index, pcireg_t lr)
125     pci_conf_write(tag, offset + LDT_LINKn_OFF(index), lr);
130 ldt_show_cap(pcitag_t tag, int offset, int secondary)
132     printf(" Cmd %08x", pci_conf_read(tag, offset));
133     offset += 4;
134     printf(" Lnk0 %08x", pci_conf_read(tag, offset));
135     offset += 4;
137         printf(" Lnk1 %08x", pci_conf_read(tag, offset));
138 	offset += 4;
140     printf(" Freq0 %08x", pci_conf_read(tag, offset));
141     offset += 4;
143 	printf(" Freq1 %08x", pci_conf_read(tag, offset));
144 	offset += 4;
150 ldt_show_cap(pcitag_t tag, int offset, int secondary)
171 ldt_wait_ready (pcitag_t tag, int offset, int index)
182         lr = ldt_get_link(tag, offset, index);
191 ldt_end_chain (pcitag_t tag, int offset, int index)
195     lr = ldt_get_link(tag, offset, index);
197     ldt_set_link(tag, offset, index, lr);
199     ldt_set_link(tag, offset, index, lr);
200     t = ldt_get_link(tag, offset, index);  /* push */
205 ldt_freq_cap (pcitag_t tag, int offset, int index)
210     cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
212 	cr = pci_conf_read(tag, offset + LDT_FREQ_OFF);
224 	cr = pci_conf_read(tag, offset + LDT_FREQ0_OFF);
230 	    cr = pci_conf_read(tag, offset + LDT_FREQn_OFF(index));
260 ldt_set_freq (pcitag_t tag, int offset, int index, uint8_t freq)
264     cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
266 	cr = pci_conf_read(tag, offset + LDT_FREQ_OFF);
269 	pci_conf_write(tag, offset + LDT_FREQ_OFF, cr);
271         cr = pci_conf_read(tag, offset + LDT_FREQn_OFF(index));
274 	pci_conf_write(tag, offset + LDT_FREQn_OFF(index), cr);
283 ldt_set_link_freq (pcitag_t tag, int offset, int link,
292     freq_cap_in = ldt_freq_cap(tag, offset, link);
301     ldt_set_freq(tag, offset, link, ldt_freq);
350 ldt_set_link_width (pcitag_t tag, int offset, int link,
356     lcl_attr = ldt_get_link(tag, offset, link);
378     ldt_set_link(tag, offset, link, lcl_attr);
391     int offset, prev_offset;
445 	offset = pci_find_ldt_cap(tag, LDT_PRIMARY);
446 	if (offset == 0) {
448 	    offset = pci_find_ldt_cap(tag, LDT_SECONDARY);
449 	    if (offset != 0) {
450 		lr = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
452 		pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, lr);
454 		cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
457 		prev_cap = ldt_set_link_freq(tag, offset, link,
460 		(void)ldt_set_link_width(tag, offset, link,
469 	cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
470 	pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, cmd);
471 	cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);  /* push */
481 	if (!pci_conf_write_acked(tag, offset + LDT_COMMAND_CAP_OFF, cmd)) {
498 	    prev_cap = ldt_set_link_freq(tag, offset, link,
501 	    (void)ldt_set_link_width(tag, offset, link,
506 	linkerr = ldt_wait_ready(tag, offset, link);
507 	lr = ldt_get_link(tag, offset, link);
508 	ldt_set_link(tag, offset, link, lr | LDT_LINKCTRL_WC);
513 	ldt_show_cap(tag, offset, LDT_PRIMARY);
517 	    ldt_end_chain(tag, offset, link);
521 	prev_tag = tag;  prev_offset = offset;  prev_link = link;
533     int offset;
554 	offset = pci_find_ldt_cap(tag, LDT_PRIMARY);
555 	if (offset == 0) {
557 	    offset = pci_find_ldt_cap(tag, LDT_SECONDARY);
558 	    if (offset != 0) {
559 		lr = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
561 		pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, lr);
569 	cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
570 	pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, cmd);
571 	cmd = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
578 	if (!pci_conf_write_acked(tag, offset + LDT_COMMAND_CAP_OFF, cmd)) {
594 	linkerr = ldt_wait_ready(tag, offset, link);
596 	lr = ldt_get_link(tag, offset, link);
597 	ldt_set_link(tag, offset, link, lr | LDT_LINKCTRL_WC);
600 	ldt_show_cap(tag, offset, LDT_PRIMARY);
604 	    ldt_end_chain(tag, offset, link);
649     int  offset;
670     offset = pci_find_ldt_cap(tag, LDT_SECONDARY);
671     if (offset != 0) {
672         linkerr = ldt_wait_ready(tag, offset, 0);
676 	ldt_show_cap(tag, offset, LDT_SECONDARY);
680 	    ldt_end_chain(tag, offset, 0);
682 	    lr = ldt_get_link(tag, offset, 0);
684 	        double_ended = ldt_fabric_init(tag, offset, port, bus, flags);
686 		ldt_end_chain(tag, offset, 0);
689 	    cr = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
694 	    pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, cr);
702 		cr = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
704 		pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, cr);
705 		cr = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
707 		ldt_wait_ready(tag, offset, 0);
715 		    cr = pci_conf_read(tag, offset + LDT_COMMAND_CAP_OFF);
717 		    pci_conf_write(tag, offset + LDT_COMMAND_CAP_OFF, cr);