Lines Matching defs:mcidx
656 * sb1250_auto_timing(mcidx,tdata)
664 * mcidx - memory controller index (0 or 1)
671 static void sb1250_auto_timing(int mcidx,mcdata_t *mc,csdata_t *tdata)
1183 base = PHYS_TO_K1(A_MC_BASE(mcidx));
1199 * SB1250_MANUAL_TIMING(mcidx,mc)
1206 * mcidx - memory controller index
1213 static void sb1250_manual_timing(int mcidx,mcdata_t *mc)
1276 base = PHYS_TO_K1(A_MC_BASE(mcidx));
2489 int mcidx,csidx;
2504 for (mcidx = d->firstchan; mcidx < MC_CHANNELS; mcidx++) {
2505 int num_csint = 1 << d->mc[mcidx].csint;
2510 mcbase = PHYS_TO_K1(A_MC_BASE(mcidx));
2524 if (!(d->mc[mcidx].csdata[csidx].flags & CS_PRESENT)) continue;
2531 d->inuse |= (1 << mcidx);
2537 columns = d->mc[mcidx].csdata[csidx].cols;
2538 rows = d->mc[mcidx].csdata[csidx].rows;
2539 banks = d->mc[mcidx].csdata[csidx].banks;
2557 switch (d->mc[mcidx].blksize) {
2579 if ((d->mc[mcidx].csint > 0) &&
2581 mask = MAKEDRAMMASK(d->mc[mcidx].csint,ttlbits);
2582 ttlbits += d->mc[mcidx].csint;
2601 if (d->mc[mcidx].flags & MCFLG_BIGMEM) {
2633 d->ttlbytes += dimmsize >> d->mc[mcidx].csint;
2673 int mcidx;
2715 for (mcidx = d->firstchan; mcidx < MC_CHANNELS; mcidx++) {
2720 if ((d->mc[mcidx].cfgcsint > 0) &&
2721 !(d->mc[mcidx].flags & MCFLG_BIGMEM) &&
2722 (d->mc[mcidx].csdata[0].flags & CS_PRESENT)) {
2726 if (!(d->mc[mcidx].csdata[csidx].flags & CS_PRESENT)) break;
2728 if (d->mc[mcidx].csdata[0].rows != d->mc[mcidx].csdata[csidx].rows)
2730 if (d->mc[mcidx].csdata[0].cols != d->mc[mcidx].csdata[csidx].cols)
2732 if (d->mc[mcidx].csdata[0].banks !=
2733 d->mc[mcidx].csdata[csidx].banks)
2740 if (csint > d->mc[mcidx].cfgcsint) {
2741 csint = d->mc[mcidx].cfgcsint;
2750 addr_bits -= d->mc[mcidx].csdata[0].rows;
2751 addr_bits -= d->mc[mcidx].csdata[0].cols;
2752 addr_bits -= d->mc[mcidx].csdata[0].banks;
2758 d->mc[mcidx].csint = csint;
2954 int mcidx;
3022 for (mcidx = d->firstchan; mcidx < MC_CHANNELS; mcidx++) {
3023 mcbase = PHYS_TO_K1(A_MC_BASE(mcidx));
3064 for (mcidx = d->firstchan; mcidx < MC_CHANNELS; mcidx++) {
3071 if (!(d->inuse & (1 << mcidx))) continue;
3076 mcbase = PHYS_TO_K1(A_MC_BASE(mcidx));
3082 mc = &(d->mc[mcidx]);
3095 tdata = &(d->mc[mcidx].csdata[csidx]); /* remember for use below */
3098 sb1250_manual_timing(mcidx,mc);
3101 sb1250_auto_timing(mcidx,mc,tdata);
3123 if (mcidx == 1) mc_cfgbits |= M_MC_IOB1HIGHPRIORITY;
3128 dramtype = d->mc[mcidx].dramtype;
3152 sb1250_jedec_initcmds(mcidx,mc,csidx,0,tdata);
3153 sb1250_jedec_initcmds(mcidx,mc,csidx,1,tdata);
3154 sb1250_jedec_initcmds(mcidx,mc,csidx,2,tdata);
3155 sb1250_jedec_initcmds(mcidx,mc,csidx,3,tdata);
3163 port = PHYS_TO_K1(A_MC_REGISTER(mcidx,R_MC_DRAMMODE));
3168 sb1250_jedec_initcmds(mcidx,mc,csidx,0,tdata);
3172 sb1250_sgram_initcmds(mcidx,mc,csidx,tdata);
3175 sb1250_fcram_initcmds(mcidx,mc,csidx,tdata);
3202 for (mcidx = d->firstchan; mcidx < MC_CHANNELS; mcidx++) {
3203 if (!(d->inuse & (1 << mcidx))) continue;
3204 if (d->mc[mcidx].flags & MCFLG_ECC_ENABLE) {
3216 for (mcidx = d->firstchan; mcidx < MC_CHANNELS; mcidx++) {
3217 if (!(d->inuse & (1 << mcidx))) continue;
3218 if (!(d->mc[mcidx].flags & MCFLG_ECC_ENABLE)) continue; /* ecc not enabled */
3219 mcbase = PHYS_TO_K1(A_MC_BASE(mcidx));